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To: The Ox who wrote (51)	12/4/2001 9:52:48 PM
From: John Finley	Respond to of 83

Thanks for the articles, Michael. I suppose with all the advances in MEMS that etching tunnels or pits behind the gates would be a logical progression. I remember years ago some colleagues etching from the backside of Si wafers for ion channeling studies. Just a little doping of the front surface would stop the etch giving them very thin Si "windows". The thickness was determined by the dopant profile. Can't hardly beat the dielectric constant of nothing <g>. JF