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To: wanna_bmw who wrote (151196)	12/5/2001 3:56:48 PM
From: Joe NYC	Read Replies (1) \| Respond to of 186894

wbmw, But keep trying. I'm sure that sooner or later, Kap's efforts will produce the ultimate Pentium 4 sloth routine that will show just how lousy the micro-architecture really is. And then the AMDroids will find a logical way of explaining how that routine will be "common" in a lot of real life applications. For about 10th time, no, that's not what this exercise is about. It is about finding out the performance of P4 decoder, if it runs at half of the advertised clock speed. Are you interested in finding out? If you are, you can lend your knowledge and experience to helping out. Joe

To: wanna_bmw who wrote (151196)	12/5/2001 4:10:35 PM
From: Ali Chen	Read Replies (1) \| Respond to of 186894

"Kap's efforts will produce the ultimate Pentium 4 sloth routine that will show just how lousy the micro-architecture really is. And then the AMDroids will find a logical way of explaining how that routine will be "common" in a lot of real life applications." You keep twisting the subject. You have accused Kap of spreading lies about 1/2-speed decoders in P4. Since he, unlike you and Tench, does not have the P4 microarchitectural design specifications handy, he is trying to design a code that would resolve the issue. The code does not pretend to be of any indication about real-world performance of the processor in general. It serves only one particular purpose, just to unfold the important architectural detail. According to analysis of Jozef Halada, Message 16747529 Kap has succeeded in proving the point of p4 decoders running at 1/2 speed. You lose. The rest are tiny insignificant details. - Ali