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To: Tenchusatsu who wrote (151269)12/5/2001 10:39:05 PM
From: Ali Chen  Read Replies (1) | Respond to of 186894
 
Ten, "I'm quite sure Intel has made gains since 1999 (the year that IEEE paper was published). ;-)"

I am sure they have made some. However,
have you ever heard about the difference
between cherry-picked research samples,
and mass production?

Also, does the "Coppermine 1.13GHz" trigger anything
in your mind?

More, even newest cherry-picked 0.13um copper samples
of SRAM do not go beyond 1.6GHz, which means that
most of 2000 MHz inside of 0.18um P4 are
largely MarketoHerz. Sorry.

- Ali



To: Tenchusatsu who wrote (151269)12/6/2001 12:43:34 PM
From: Joe NYC  Read Replies (1) | Respond to of 186894
 
Tenchusatsu,

I'm quite sure Intel has made gains since 1999 (the year that IEEE paper was published). ;-)

But double? Come on. Do you believe L2 is running at full speed? There is no need for full speed L2, since there is latency in looking up the value anyway, or there can be 2 interleaved areas.

Trace Cache, which is a lot more performance critical and is running at half speed.

I don't know how much progress Intel made with their .18u process, but the Piii did not get much above 1 GHz, and P4 with marketing frequency of 2 GHz is not getting far above the 1 GHz limit with the half speed cache.

Joe