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To: wanna_bmw who wrote (151358)12/6/2001 4:03:32 PM
From: GVTucker  Read Replies (1) | Respond to of 186894
 
AMD just got the jump on Intel and upped their revenue forecast for the 4Q.



To: wanna_bmw who wrote (151358)12/6/2001 4:13:23 PM
From: Joe NYC  Read Replies (2) | Respond to of 186894
 
wbmw,

the L1 data and traces caches, both operate at a 2-cycle latency, so it doesn't make sense to use a full speed clock.

There is some lookup logic causing latency.

Slightly off topic, but I wonder at which speed the Athlon's caches run at. The Athlon L1 caches both have a 4-cycle latency, so do they run at 1/4th the clock frequency?

I think the L1 latency is 3 clock cycles, not 4, and the same applies, the data needs to be looked up. The same for L2, where the latencies are even longer.

As far as the speed of Athlon L1 and L2 caches, my WAG is that L1 may be full speed and L2 may be half speed. I don't know.

Joe