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To: Joe NYC who wrote (65218)12/8/2001 2:58:59 AM
From: kapkan4uRespond to of 275872
 
<One problem I see with this is that if you assume that somehow the decoder is full speed, and can decode 1 istruction per clock cycle >

First I never said (or assumed) that. Second, when a new trace is built (which is always the case in this test) the execution engine gets uops directly from the decoder, not from the trace cache.

Kap



To: Joe NYC who wrote (65218)12/8/2001 10:49:28 AM
From: Charles GrybaRespond to of 275872
 
Joe, and no less than 2?

C



To: Joe NYC who wrote (65218)12/9/2001 2:11:58 PM
From: Harvey AllenRespond to of 275872
 
Refurb A7M266 $75. free shipping

newegg.com

Still the best DDR board around IMHO. Does 166/333 FSB CAS 2 easily with Crucial PC2100. XP compatible also.

Came across it while ordering a CHAINTECH 7SID MICRO ATX

newegg.com

Harvey


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