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To: whortso who wrote (66286)12/25/2001 11:55:19 PM
From: Dan3Respond to of 275872
 
whortso, your reading comprehension is slipping even lower.

Chipsets have a lot of pins, the pins require pads (as you actually posted earlier, evidently without having any idea what the words you copied meant).

Pads require die space.

If a chip being FABed is a part of a chipset, it usually has many hundreds of pins, so it needs many hundreds of pads.

Each pad requires space on the die, so a chipset, which has many hundreds of pins, will have a minimum die size regardless of how little silicon the semiconductors used by the chip may require.

You can't shrink a chipset die below the size needed by the pads for the pins - that's why there is a minimum size for chipset dice. The same is true of CPU dice, but it is much less likely to be a controlling factor, since CPUs use a lot more silicon for logic, and generally have no more pins than chipsets. Chipsets usually have (relative to CPUs) less of a need for semiconductor logic space, but need as much or more space for pads.

This is why chipsets are usually FABed on processes using larger rules than the CPUs they support. (e.g. chipsets for most CPUs made on a .18 process are FABed at .25, or even .35).

Check it out.



To: whortso who wrote (66286)12/26/2001 1:10:51 PM
From: pgerassiRead Replies (1) | Respond to of 275872
 
Dear Whortso:

You must have a comprehension problem. Take the 762MPX AMD chipset. This chipset has 900+ pins. A Duron has 423 pins and is 104mm2 at 0.18u and it uses flip chip (not normally used in northbridge chips). If it had 846 pins, it would still need to be 208mm2 to fit the number of pins and can have twice the transistors (70 million). But the 762 does not need that many. IIRC, the 762MPX is made on a 0.35u process for its 10 million or so transistors and it still has free (unused die area). Heck, Micron said that it could add 8MB of ESDRAM (68M transistors and 64M capacitors) onto its Mamba chipset for free (spare die area) at 0.18u with 900+ pins.

You are saying that both AMD and Micron process and design engineers are wrong and you are right. I am ROTFLMAO! You are the fool and do not even know it!

Pete