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To: Elmer who wrote (66296)	12/26/2001 1:23:43 PM
From: Dan3	Respond to of 275872

Re: Q4 estimates: Processors 25 million Chipsets 40 million OK, I just want to get the details straight here. So, you're figuring that VIA, SiS, and ALi made 0 chipsets, that AMD+VIA sold 15 million CPUs last quarter (40-25) and that Intel made every single chipset for every single CPU? Including all chipsets for AMD and VIA CPUs? Or are you figuring that there's a big market for chipsets that are never used with a CPU?

To: Elmer who wrote (66296)	12/26/2001 1:28:51 PM
From: Dan3	Respond to of 275872

Re: only about 3.85 million units from even only 3500 WSPW Dresden's numbers will probably be closer to 5.5 million units from 3000 WSPW. Austin is underutilized.

To: Elmer who wrote (66296)	12/26/2001 2:22:02 PM
From: pgerassi	Respond to of 275872

Dear EP: These are your estimates: Q4 estimates: (not based on any inside information) Processors 25 million Chipsets 40 million StrongArm 3 million Other logic 3 million Total 71 million Not counting any Flash My estimates: Processors 25 million (5 million at 0.13u 20M at 0.18u) Chipsets 20 million (16M at 0.35u and 4M at 0.25u) StrongArm 3 million all at 0.18u Other logic 3 million all at 0.35u Totals: 51 million AMD/Intel: 8.3M/23M or 1/2.76 at 0.18u 0M/5M or 0/5 at 0.13u A Q4 WW market share of 25% for AMD (8.3M of 33.3M), 74+% for Intel and 1-% for Via. As to overall yield, you take process yield (good die / total die) multiply it by yield due to assembly and test problems (good packaged die / good bare die) and by saleable bin split yield (saleable die / good packaged die)to get overall yield (good packaged die / total die). The first two yields are about the same for both AMD and Intel. The last yield, is the one where there might be problems for Intel wrt P4. Thus, for AMD the numbers might be 80%, 98%, 98% for a total of 77% for AXP and for INtel and P4 the numbers might be 70% (the larger die causes this), 98%, 66% (50% yield at 1.4GHz) for a total of 45%. Thus overall useable wafer area needed would be 128mm2/.77 or 167mm2 for AXP and 217mm2/.45 or 482mm2 for P4, about the ratio currently seen. Yes the process people are not at fault for this but, the design could easily account for the trouble. The reported shortage of P4s is at the higher bins (the exact opposite of the AXP which is sold out at the lowest bins (AMD wants to reduce downbinning, of course)). Thus, the likely cause of the shortage is that the speed curve peaks at too slow a speed (I estimate around 1.4GHz). This is the exact trouble that the P3 was in at 0.18u. So, deja vue all over again (gotta get to 0.13u fast). As to AMD overall yields, about 200 total die fit on a wafer at 128mm2 each and at 77% overall, 154 good saleable packaged CPUs per wafer should result. 4 million sold for Q3 should been able to be made from 26K wafers or a run rate of 2000 a week, only 40% of the supposed capacity of Fab 30. Either the build out (ramp) of 0.18u which was to be done by now (end 2001) has slowed or half the plant is in the midst of the change over to 0.13u. The later is more likely since the 0.13u is to be complete by Q4 next year. For Intel 7M P4's which should have 100 possible on each wafer or a total of 45 good saleable packaged die per wafer. They would need a total of 156K wafers Q3 or about 12K a week. This is only 24% of the available capacity of their 0.18u fabs. 22 million P3s (mostly Celeron) should have 300 total on a wafer or 220 good saleable packaged die per wafer. Thats about 100K wafers Q3 or about 8K a week. The total of 20K wafers per week is about 40% of its capacity shows that Intel is in the same boat. However, since other fabs are ramping to 0.13u, they have far less of an excuse. Pete

To: Elmer who wrote (66296)	12/26/2001 2:45:35 PM
From: TGPTNDR	Read Replies (1) \| Respond to of 275872

Elmer, Re: <...and AMD made the statement that they were supply constrained. > No. They have said they are Dresden supply constrained. They've made no such comment wrt Fab 25, at least that I'm aware of. And they specifically differentiated between the two conditions. tgptndr

To: Elmer who wrote (66296)	12/27/2001 5:42:24 AM
From: fyodor_	Read Replies (2) \| Respond to of 275872

Elmer: I figure Intel makes almost 10x the chips AMD does. I'll do something you don't do, I'll provide numbers. Q4 estimates: (not based on any inside information) Processors 25 million Chipsets 40 million StrongArm 3 million Other logic 3 million Total 71 million Not counting any Flash If you are including everything else, why not include flash? Ok, to be consistent, let's stick only to x86 processors&#133 using your numbers: 25M ~ 3 x 8M Which was my claim. So why do you say that I am way off here? I see AMD's F30 output at about 1/2 -2/3s expected, even at reduced wafer starts. With regards to actual yields at, e.g., Dresden, you are forgetting a few things. All of AMD's process development takes place at Fab30 in Dresden. Intel has an entire Development Fab devoted to such matters. How much of Fab30 is dedicated development purposes? I don't know&#133 which, again, is pretty much my point: We don't have nearly enough data for even an educated guess. -fyo