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To: semiconeng who wrote (66567)	12/29/2001 1:55:14 AM
From: Elmer	Respond to of 275872

I think that you're referring to the wafer manufacturing process, as i know intel does functional testing of finished die as well as packaged chips. This is not necessarily the case. Functional testing may not be needed to guarantee a quality product. Hotly debated issue here. As I understand it, in order to insure the semiconductor manufacturing process is working properly, in-line monitoring is done using various analytical techniques, on test structures, in the scribe lines in between the die, or sometimes rarely, on the die itself. If the test structures are the correct critical dimensions and or functionality, the die structures most likely are too. of course, nothing is absolute. You are talking about etest structures and these are not to be confused with structural testing. Similar names but different animals. Etest structures are used for SPC (Statistical Process Control). They give you feedback on the process. What are your CDs? VTNs, VTPs, contact resistance, poly resistance, oxide breakdown, on and on. Assuming they are within your process limits, they don't tell you anything about your defect density. You get that from your process monitors. You must have a high volume product that you use as your process monitor, right? That tells you what your defect density is running at. I know Intel has a term for it and I shouldn't post it here because it's proprietary but the numbers 675-680 should mean something to you if you track wafer yields for any products. Do you ever track yields? EP