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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: Bill Jackson who wrote (66686)12/30/2001 9:46:38 PM
From: ElmerRead Replies (2) | Respond to of 275872
 
Elmer, Standby current? The current with voltage applied and no clock so you get the summed leakage through all the gates in a random manner? or do they go to a standard position via biasing with no clock?

There's really no way to get them all in the same state so after reset is about as consistent a baseline as you can get.

Well, this must be quite low. I have never heard of this being an issue before now.

It is not low, it is quite high because transistors don't fully turn off. This is a digital thing, not an analog thing. Intel has published a number of papers on this problem recently and it's certainly not an Intel specific problem. It's everybody's problem.

usually AMD publishes more data than Intel. Unless AMD publishes it under another name or replaces the term with another measurement.

Sub threshold Leakage is non linear. It rises slowly with temperature and then at some point rises exponentially. Intel publishes their 100Deg standby leakage which is quite high. AMD publishes their 50Deg standby currents which are much lower. The last time I saw raw data the "knee" of the function was around 65 Degs so you can not compare AMD data with Intel data and draw any meaningfull conclusions.

I would also expect more gates, as in P-4 to have a larger standby current.

Good observation Bill and valid.

Is this easy to measure by remiving the clock from a system and using a milliammeter?

All modern testers have the capability to measure the current delivered to the device, both statically and dynamically.

EP