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To: milo_morai who wrote (157099)	1/28/2002 12:01:37 PM
From: wanna_bmw	Respond to of 186894

Milo, Re: "That is only a small improvement. Integrating the memory controller and improving the cache hits is the best place to find large performance gains. And this is done by improving the latency so the data is always there for the next Instruction." You're looking at this through an over-simplified view, and you're ignoring all the points that I've brought up. Yes, an integrated controller will improve performance by reducing overall latency, but at what price? Obviously, it will constrict system customizability; it will create more complicated logic that takes more time to design, and more time to validate; it will amplify any hot-spots on the die, and increase the load requirements on the CPU; and, performance will be dependant on how efficient AMD can design their controller (and implementations may vary). I know you understand the concept of latency, and I know you see reducing it as a positive thing, but I believe it is you who are only looking at the smaller picture, and not realizing the possible trade offs of this implementation. wbmw