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To: dale_laroy who wrote (69586)1/30/2002 6:59:56 PM
From: wanna_bmwRead Replies (1) | Respond to of 275872
 
Dale, can you explain what you mean by "triadic" instructions?

Thanks.

wbmw



To: dale_laroy who wrote (69586)1/30/2002 7:13:26 PM
From: AK2004Respond to of 275872
 
Dale
I am not sure what "hypothetical architecture" you are talking about but it seems that your assumption is that intel wanted to follow amd.
Regards
-Albert



To: dale_laroy who wrote (69586)1/31/2002 1:19:05 AM
From: kapkan4uRead Replies (3) | Respond to of 275872
 
<When AMD first preannounced Hammer, they stated that K8 would have triadic instructions. My guess is that Intel will have based their own x86-64 architecture upon this hypothetical architecture and as a result, Intel's x86-64 implementation will have a triadic instruction set. >

There were no triadic instructions outside of TFP, which were quickly squashed. Besides, even if there was such proposal, why would Intel pattern their ISA after AMD's throw away sketches? The only reason for Intel to follow x86-64 compatibility would be Microsoft telling Intel that there would be no support for another x86-64 ISA. I know that was the attitude of the OS group. Let's hope that they have prevailed.

Kap