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To: Joe NYC who wrote (158533)	2/12/2002 4:35:09 PM
From: combjelly	Read Replies (1) \| Respond to of 186894

"We don't know how may wafers the Q4 output was based on" No we don't. Assuming that the processors sold in Q401 were made in Q301, and that they were on a linear ramp that started at 2500 WSW at the beginning of Q101 and ended at 5k WSW at the end of Q401, that would mean that started Q301 at 3750 WSW and ended at 4375, with an average of 4063 or so. But it is more convenient for everyone to assume that AMD was blasting out 5k WSW during that time...

To: Joe NYC who wrote (158533)	2/12/2002 4:41:07 PM
From: wanna_bmw	Read Replies (1) \| Respond to of 186894

Joe, Re: "I doubt a huge prortion of it will go to Dresden, especially after reading your quote about being af full wafer start capacity in Dresden." So AMD already has all the .13u equipment? According to the other quote I posted, they don't. Bob Rivay wouldn't have gone on to explain the need to install 130nm capacity in Dresden if the capex wasn't going there. Re: "Whether all of it is online and in production, I have no idea, but AMD spokesmen said that the crossover (from .18u to .13u would be in Q2). Since we are in Q1, we are somewhere between > 0% but < 50%" There have been zero 130nm product launches. Apparently, it's much closer to 0% than 50%. Re: "Going to Q1, desktop CPUs will be entirely XP, there will be Tbred notebook and MP chips, replacing Palomino chips. By the end of the quarter, mobile Palomino should be limited only to some Morgan. Toward the end of the quarter, some capacity will be converted from Palomino XP to Tbred." Like I said, the quarter is half way over, and no 130nm. Wafer starts may have started the transition, but I doubt we will see significant silicon this quarter. wbmw