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To: Petz who wrote (71871)2/18/2002 6:55:23 PM
From: dale_laroyRead Replies (1) | Respond to of 275872
 
>I don't think it should take more than 5% of the die size to implement SMT, even less for the large-cache NW's.<

Not SMT, Jackson Technology. I doubt if P4 has SMT hidden in its dark transistors. However, Jackson Technology could be implemented with SMT in the 90nm P4.



To: Petz who wrote (71871)2/19/2002 9:36:46 AM
From: hmalyRespond to of 275872
 
Petz Re...I don't think it should take more than 5% of the die size to implement SMT, even less for the large-cache NW's.<<<<<<<

If all of those dead transistors aren't needed for Jackson tech. then why all of the extra transistors. New surprises we haven't heard about, inefficient design, were a lot of extra transistors needed for the extra steps. Or is it another marketing ploy, whereas people assume the larger sized chip is more capable.


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