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To: Dan3 who wrote (159449)2/20/2002 1:18:53 PM
From: Paul Engel  Respond to of 186894
 
Blow Boy Dan - Re: "Time for you to go back and review the Sledgehammer design. The brilliance of AMD's design team has come up with a "third way."

The brilliance of MAD's design team hasn't yet produced a saleable Shamster product.



To: Dan3 who wrote (159449)2/20/2002 1:32:02 PM
From: wanna_bmw  Respond to of 186894
 
Dan, Re: "Re: The only alternative is to have separate memory per processor, and that requires ccNUMA support
>> Time for you to go back and review the Sledgehammer design. The brilliance of AMD's design team has come up with a "third way.""


Nope. A 4-way Hammer system will supposedly have local memory on each CPU, which still has the topography of ccNUMA. Since most software doesn't support having such local memory, AMD is simply willing to "eat" the latency, as it broadcasts transactions to every node. This will account for a huge penalty. AMD wasn't "brilliant" in this approach - they are simply brute-forcing their way into it by taking advantage of all the bandwidth on the Hypertransport links. Of course, that means that most of the benefit of all that bandwidth is going to be lost due to AMD's implementation.

wbmw



To: Dan3 who wrote (159449)2/20/2002 1:54:11 PM
From: Tenchusatsu  Respond to of 186894
 
Dan, <The brilliance of AMD's design team has come up with a "third way.">

Someone who obviously has no clue of what he is talking about would call anything "brilliant."

Tenchusatsu