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To: Charles Gryba who wrote (72402)2/25/2002 9:55:10 AM
From: Pravin KamdarRead Replies (1) | Respond to of 275872
 
EE Times article on McKinley and an HP chipset for it:

eet.com

Pravin.



To: Charles Gryba who wrote (72402)2/25/2002 10:00:27 AM
From: combjellyRead Replies (1) | Respond to of 275872
 
"I have a feeling this SMT thing will blow up in Intel's face."

Maybe, the devil is in the details. While in principle, the P4 should benefit from SMT a lot, Intel also did a lot of work to optimize the resources available to the needs of the processor. As a result, there are not a lot of idle resources available for SMT to take advantage of unless the code is optimized for the situation. I guess this is what Tench was talking about when he said that code would have to be optimized for hyperthreading...

This poses a problem for Intel. Optimizing the code for hyperthreading is not something that can easily be done by the compiler, it needs to be done by the programmer. And that means it likely won't be done at all except for a few applications. With Prescott due out sometime next year, there will be a tendency to wait and see. On the upside, any code optimized for Prestonia is likely not going to be a pathological case for Prescott, so, other than the effort required, is not a loss for the future...