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To: Tenchusatsu who wrote (160757)	2/28/2002 10:36:41 PM
From: Joe NYC	Respond to of 186894

Tenchusatsu, You've got to be kidding me. If that's the case, then there is no need for chipsets supporting Intel's FSB to enable 2+ way configs either. All you do is add another processor to the bus. It's that simple! Trust me, Joe. It IS harder to implement multiprocessor configs with HyperTransport than it is with the FSB. The reward is better scalability, but don't kid yourself into thinking that it's a walk in the park. I didn't say that it is simple. The difference is that all the work is on the CPU end, which includes all the logic + switching (which is not an issue in a shared bus). And there is no external chipset managing the communication between the CPUs, only traces connecting them (if my understanding is correct). The complexity of HT is a reason (I just posted on the "other" thread) that I think it would be the best idea for AMD to initially release Clawhammer with single HT link and dual channel DDR, which would completely sidestep the the need to debug multiprocessing for now, so that it does not become a show-stopper for the desktop release at the end of 2002. Joe