SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: THE WATSONYOUTH who wrote (73116)3/4/2002 1:39:59 AM
From: Ali ChenRespond to of 275872
 
TWY, "even the low Vt devices should have off currents well below the 100nA/um"

In my understanding of the 2001 IEDM charts (slide 15)
[0.13micronlogic_pres.pdf],
the 1e-7 A/um happens at 0V Vgs. However, at about 100mV,
the off-current seems to be 10x of that, 1uA/um.
Is it possible that due to imperfect ground distribution,
many gates are actually driven far from an ideal signal
level? I recall P4 datasheets where the static Vcc drop
can be about 50mV at 17A, so the ground could of the
same order.

- Ali



To: THE WATSONYOUTH who wrote (73116)3/4/2002 2:25:30 PM
From: PetzRead Replies (1) | Respond to of 275872
 
Let's assume there are perhaps 25 million devices in L2 cache and perhaps 40 million in logic and L1 cache

If this is accurate, Intel is lying by saying that their Model Number Northwood 2200 runs at 2.2 GHz. If there are just 8 million transistors in the decoder and trace cache (and, I suspect, the FPU), the MAJORITY of transistors in the NW run at half speed.

How can Intel call this part 2.2 GHz?

Petz


HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News