SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Nokia (NOK) -- Ignore unavailable to you. Want to Upgrade?


To: Dexter Lives On who wrote (18616)3/5/2002 10:04:58 PM
From: Eric L  Read Replies (1) | Respond to of 34857
 
<< On the Microsoft-Nokia challenge issue, notice that they're not even targeting Qualcomm or CDMA >>

You mean CDMA & the Seven Dwarves?

Message 16712855

- Eric -



To: Dexter Lives On who wrote (18616)3/5/2002 10:41:38 PM
From: 49thMIMOMander  Respond to of 34857
 
Well, no need to go back to Raquel, but any DSP since that time has always been a RISC, it just
took some time for Intel to "admit" that, facing AMD and their 12MHz 286.

Luckily for UK the ARM.ltd tradition continued on, but personally I would not point to the
RISC aspect as much as to those symmetric 16-32 registers usually designed into RISC
designs, making it possible to run fast internally with slower memory.
(someting Intel also does, in their own CISC, sillycone wasting way, counting on fast, power wasting RAM
or hard to handle caching stuff)

The 386 architecture has always used the CPU external memory as a "fast" replacement
for local variables, works OK if lots of power and cooling hardware available, but totally
outdated these times. (x86 architectures only have 3-4 usable registers, lots of
back-and-forth-writing-loading from memory)

Skipping these fundamental bad issues of the CISC x86 architecture, ARM.ltd has additionally
adopted some really smart ideas, like mixing 16 and 32 bit code when either one is the smartest
thing to use.

The tradegy for Intel is probably that they locked themselves into non-RISC architectures
when the AMD 12MHz 286 beat them, when RISC became a non-Intel word.
(plus the anti-DSP thing against Intel in the early 90s)

However, the joke has been that any Pentium actually is designed with something between 16 to 128 RISCs
in it, but Intel cannot say that is the case.

ARM was and is "great", but their compilator is lousy.

Ilmarinen

Anyway, it has been "fun" to watch how "everyone" has adopted, bought an ARM license during the
last 3-5 years. Most contracts probably demanding that no big fuzz should be made about that little fact??
(on the other hand, similar designs float around, the Hitachi SH-family, etc, most of them going back
to when AMI sold everything it had)

But at that point the OS becomes important, the ARM-SYMBIAN axis (unluckily kind of banned
by any media or capital connected to Intel-MSFT, most funnny the (MS)CNBC-UK)

But, no processor is better than its compiler and tools, what the Intel-MSFT axis have
improved on since they got rid of Watcom.

My personal guess is that those times are gone, even Intel does not need to obey MSFT anymore...