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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Charles Gryba who wrote (161862)	3/12/2002 11:32:59 AM
From: wanna_bmw	Respond to of 186894

Constantine, Re: "this is where Intel is going. 6.5MB L2 for Prescott." I think you misunderstood what Anand was saying. According to this, the 6.5MB cache was, in fact, just an SRAM cache array. There was no CPU logic. Message 17186399 Looking again at Anand's wording, I can see where you are confused. "Today Intel announced that they have produced a fully functional 52Mbit SRAM (6.5MB) based off of the 90nm process that will be used for the Prescott core. While Prescott won't feature nearly as large of a L2 cache, the SRAM cells used in this demonstration silicon are identical to those that will be used with Prescott." The first sentence is ambiguous, but Anand was talking about the 90nm process, not the cache, that will be used for the Prescott core. The second sentence pretty much clarifies. Edit: one other thing: since we know that Intel can get >6MB of cache into a 110mm^2 die, we might be able to estimate the die size for processors on 90nm. So the information here is pretty valuable. Thanks. wbmw