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To: Dan3 who wrote (74801)3/18/2002 2:49:01 AM
From: milo_moraiRead Replies (1) | Respond to of 275872
 
<font color=blue>AMD Wins Major Awards at CeBIT

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To: Dan3 who wrote (74801)3/18/2002 5:50:04 AM
From: fyodor_Read Replies (1) | Respond to of 275872
 
Dan3: How could you work so hard, and then so profoundly misunderstand the data you'd collected?

I didn't. On either account.

Plugging a few numbers into a spreadsheet doesn't exactly take long. The most time-consuming element was actually formatting it for SI. And with several hours in a train on short notice, I had little else to do :(

As for misunderstanding anything, I haven't. I clearly stated that this was a comparison of AthlonXP model #s vs P4 Northwood frequencies. These are the numbers they sell by, so these are the numbers that are interesting.

But IPC for Athlon falls off more slowly as mhz increase - you've just proved in practice what I predicted in theory. Look at the measured Delta P over Delta f in your listings.

Unfortunately, you appear to have misunderstood something. I didn't include this explicitly in my previous post, but try plugging the numbers into a spread sheet. Believe me, it will become quite apparent: AthlonXP's rate of change of IPC (d²P/df²) is much higher than Northwoods (well, both are negative, but XP's is more so than NW's).

Thanks for your hard work, and you've certainly proven that AMD has to adjust the rate at which it is scaling model numbers when it ships Thoroughbred.

That was exactly my point ;-)

However, even the second derivatives are in Northwood's favor. But not Willamette (not always, anyway). This is quite clear from the data as well.

As an example, take a look at the Quake3(NV15-Demo) scores. It might make it easier for you to see, if you use a spread sheet and perhaps even fit them to a curve. Most spread sheets only offer a very limited number of functions to fit to, however. Excel, for example, only permits linear, log, poly and exponential fits. Clearly, none of these are perfect for benchmarks showing asymptotic behavior (benchmarks scores approaching some definite value, regardless of how high the frequency is - i.e. the case where the CPU no longer represents any meaningful bottleneck). Logarithms, however, are a decent model for these in localized regions (they underestimate the severity of the drop, of course).

What I found more interesting than all this, however, is that if you look at the dP/df, XP's resembles Willamettes much more than it does Northwoods (not talking about dP/dQf). Clearly, the P4 gains significantly in scalability from the added L2 cache (not just a plain % increase in performance over Willamette, but a better dP/df and d²P/df² as well!). I think it's very likely that the Athlon would show similar improvements (for AMD's sake, I hope so). If we had some Duron scores, we could perhaps better estimate the behavior.

You might also further note that my analysis predicts P4 hitting a wall as its prefetching of 128 byte cachelines saturates memory bandwidth, rather than expecting a more rapid reduction in performance scaling (compared to Athlon) as clock speeds increase.

I have no idea what you mean by this in relation to your comment that my data shows this to be true.

If your point is that AMD will have to provide more mhz per quantispeed increase, then I agree 100%, but that's rather obvious and expected

I agree, it's not exactly surprising, but your previous comments quite clearly expressed the opposite. If AMD were able to keep Athlon IPC high - or at least have it fall of slower than P4 - they could stick with their current quantispeed rating formula forever. This is not the case, however: While Athlon's IPC certainly is higher than even Northwoods (in most cases) right now, the rate of change is not in AMD's favor.

-fyo