SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?


To: combjelly who wrote (162497)3/19/2002 11:27:49 AM
From: wanna_bmw  Read Replies (1) | Respond to of 186894
 
Combjelly, Re: "8mm^2 for 256KB extra cache"
>> This would be assuming that AMD uses a smaller cell size than they have been doing recently.


Actually, I'd say it's a little large for .13u. Intel's .13u process can produce SRAM cells that are 2.1 um^2. Thus, for Intel, 256KB of cache would take up (2.1)(9)(1024)(256) = 5.0mm^2. Add 10% for overhead, and you have 5.5mm^2. I think 8mm^2 for AMD seems reasonable, since it suggests a cell size of 3.1 um^2 (again assuming 10% for overhead), or almost 50% larger than Intel's. Do you think that AMD's SRAM density is worse than that?

wbmw