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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: hmaly who wrote (75627)	3/26/2002 2:07:08 PM
From: Ali Chen	Respond to of 275872

"However Yousef said that.." My opinion on this matter is Message 17246298 I think Yousef is close to understanding of the issues, as compared to test technician. Sorry for the outburst. - Ali

To: hmaly who wrote (75627)	3/26/2002 2:26:49 PM
From: combjelly	Read Replies (2) \| Respond to of 275872

"What I am trying to determine is why Elmer feels AMD would have more of a particulate contamination problem than Intel." The whole particle contamination thing came about because Elmer ran across an article that claims the equipment sheds a similar number of particles for a 200mm wafer as a 300mm wafer. If true, and assuming the equipment is the source of most of the particles, then that would give a big advantage to 300mm as far as defect density. I am not sure this is totally valid, I suspect that the particles shed is a function of time, and for many steps a 300mm wafer will take longer to process than a 200mm one. But... Any way, assuming that AMD does have a lower yield than Intel, it is more likely a function of other factors. For one, they may be more aggressive on design rules. Having more metal layers would be a DD problem, since there are more steps, there are more possibilities for particle defects. In the past, Intel tuned their processes more for yield than performance, AMD often did the reverse. This also can impact yield, what would normally be the slower chips of the batch just don't work because they have transistors than can't be turned on instead of just working slower. Or AMD's yield could be fine, but to get the bin splits they want, they trash can the slower ones instead of selling them. These problems are quite as easy to correct.

To: hmaly who wrote (75627)	3/26/2002 3:27:27 PM
From: milo_morai	Respond to of 275872

Actually Fab 30 uses POD's to transport all wafers within the Clean Room. I believe the wafer only leaves a POD when it's in a machine. LSI's gresham fab uses POD's and a mono rail system to transport the wafers. I think INTC has only recently started using POD's. So I cannot see how INTC has a advantage here. M.

To: hmaly who wrote (75627)	3/26/2002 3:38:39 PM
From: Yousef	Read Replies (1) \| Respond to of 275872

Hmaly, Re: " ...Don't both buy close to the same filters and use close to the same clean room processes. In particular, if AMD did have a DD problem, couldn't AMD simply upgrade the clean room and filtering system ..." You are over-simplifying the problem. Hard defects can be caused by any piece of equipment in the cleanroom. It can be due to impure incoming material (gases, liquids, ...), it can be due to the equipment recipe being used (power, pressure, slurries, ...), it can be caused by the environment (filters, wafer handlers, ...), the list can go on and on. This is why "Copy Exactly" is so important to achieve the same yield/defect density in different Fabs. Make It So, Yousef