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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Dan3 who wrote (163139)	3/29/2002 12:57:19 PM
From: wanna_bmw	Read Replies (1) \| Respond to of 186894

Dan, Re: "By the way, don't you think that claiming a cache as full speed (compared to the model number clock) when it operates at "full speed, transferring data on every other clock" is just a bit disingenuous? Transferring data on every other clock is half speed the way most people look at it." I've been able to ask around, and I have verified that the Pentium 4 cache works at full speed, it can transfer data at every clock, and is dual ported, besides. These are facts, Dan, and no conjecture or speculation from the armchair experts here is going to change that. The Pentium 4 obviously lacks in IPC due to the longer pipeline, which gives it a greater penalty on any kind of pipeline stall or flush. You yourself have recognized this deficiency, so why do you continue to spread the rumor of other deficiencies in the system. If the cache really were as sub-par as you say, then performance would indeed be much worse than it already is. Your other argument about Pentium 4 model numbers also does not make sense. 2.0GHz is chosen because the internal clock operates at 2.0GHz for just about all the parts in the system. The exceptions include a couple of arithmatic / logic units that run at 4.0GHz, but are only 16-bit wide, which eliminates the benefit of the double clock frequency, but at least offers the benefit of twice as much data latched per 2.0GHz clock cycle, which gives the illusion that there are twice as many dispatch queues. I'm also told that the L1 data cache operates at 4.0GHz, which probably explains why Intel limited the size to 8KB. But these are the aggressive kinds of optimizations necessary to feed a 20+ stage pipeline. I probably don't need to tell you, so why do you ignore this aspect of it, and make up stories of cache speeds, instead? Stick to the facts, and at least you have an argument. wbmw