Dale,
I disagree here. Growing the market requires cheap parts, and AMD should always have at least one part under $50.
AMD can have not one, but 5,000,000 sub $50 parts (Austin Durons) But it would not grow market share and revenue one cent. That's because Duron is no longer a desirable part. Nobody wants to buy any more than AMD is selling currently.
AMD can grow market share by producing desirable parts. Having parts available that have the lowest acceptable desirability has lead AMD nowhere, yet this is what you seem to be suggesting that AMD continues to do.
If AMD completely trashed Morgan, and produced Palominos in Austin with frequency just below that of Dresden Palominos. The part would be desirable, more of them would be sold, and cost to AMD would be exactly the same, since Austin is some 75% idle, and the fab employees are just playing frisbee with wafer blanks. There were reports of some spot shortages of low speed Palominos (1500 and 1600).
Anyway, the management of AMD is starting to remind me of the Soviet Politburo. They are so slow to react, they are entrenched in following everything that Intel does, and they probably lost the nimbleness to fight guerilla warfare with the Gorilla.
AMD has no obligation to provide value processors to anybody. The value processors are those processors that a company is unable to sell for higher prices. Setting out to make a "value processor" is like the recipe of our socialist/Democrat/buearocrat to low income housing - build ugly crappy structures, that will only get uglier and crappier as the time progresses. Instead, the goal should be build (encourage building) of mainstream middle class, and high income housing only. After a period of time, middle class will want something else (better), new middle class housing will be constructed, and the low income people will move to what once was the middle class housing.
Having Appaloosa on the roadmap is just so retarded, it is beyond comprehension. It has not lead AMD anywhere in the past, and is a dead and now. It is just following my housing example, of builing something ugly, crappy and undesirable from the start, rather than shifting downmarket the existing Palominos, while supplies and .18u wafer processing lines are running, and shift Athlon higher.
With P4 Celeron having just 128KB L2 cache, Appaloosa should do just fine in this market.
I can tell you with absolute certainty that when you have a processor that is only just as good (bad) as Intel, Intel processor will be sold. If AD wahts to sell this processor, which is only just as good as Intel processor, AMD has to drop price to 25%, even 50% below Intel.
Sledgehammer will be huge at 130nm, larger than Northwood, and with nine layers of metal interconnects.
I seem to recall that Sledgehammer will be 140 to 150mm^2 at 130 nm, more or less the same ballpark as Northwood, probably even smaller than NW would have been if it had 1MB L2, not much bigger than 120mm^2 Palomino. And most importantly, it will coexist throughout most of its life vs. 90nm Prescott which will have 1 MB L2, while AMD has their uual 3 to 9 month delay in introduction of newer process technology.
If AMD is caught 1 year from now with only Clawhammer to compete with 90nm Prescott, we will have an exact repeat of the sorry situation AMD is in today. Waiting for process / core upgrade, while competition is running away with market share. Jerry will be left patting himself on the back how efficient the 5 million Clawhammers (left unsold in the inventory) are, with only 100mm^2 die size. The tradeoff would have been 2.5 million Sledgehammers not being in inventory, but being sold for $200 ASP, bringing in half a billion dollars of revenue.
With dual DDR mobos for P4 not being common in Q4 of this year, or even Q1 of next year, Clawhammer is the better processor to go with.
Again, you are suggesting the minimum, rather than moving in front, defining what the high end desktop standard is, and forcing the competition to scramble. AMD did this with Athlon, to a certain extend.
Intel already has a dual channel Rambus chipsets, that is being used for PR and benchmarks, Via and Sis will have dual channel chips ready for Christmans season, and possibly, Intel will have one as well. I have seen conflicting report on whether it will arriv in Q4 or Q1 of 2003.
However, by Q2 2003 AMD would be feeling the pressure from a lack of a dual DDR Hammer on the desktop. And with the emergence of Prescott, 1 MB of L2 cache could also become desireable.
So you are suggesting that AMD is in eternal catch-up mode. Well, it may turn out that that is the best AMD can do. But to shoot yourself in the foot with the misguided Appaloosa / Clawhammer strategy of selling crippled parts, to save die space, only to have an unsold die space size of Texas left at the end of the quarter, that's something else. That's the roadmap AMD is on.
With this blended average die size for 130nm, Dresden might not be capable of more than 5 million processors per quarter.
AMD produced about 4 to 4.5 million 120mm^2 Palominos, while the fab was not fully ramped. With 130mm^2 chip, there should be theoretical 16.5 million die candidates, and even 40% of that should be 6.6 million processors. And if you recall my suggestion for the composition of these 6.6 million:
- 256K L2 Tbred Duron 80 mm^2
- 512K L2 Barton notebook, SFF desktop 100 mm^2
- 1MB L2 Sledgehammer Athlon desktop to DP server
These parts would have a blended ASP of $150 to $175, with processor revenue of $1.1 billion
AMD's plan is to produce twice as many chips, all crippled, they would sell for 1/2 of the ASP ($75), half will go unsold, so the result will be 6.6 million chips sold at $75 ASP, resulting in revenues of $500 million.
Joe |
