SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: hmaly who wrote (77850)4/21/2002 10:15:52 AM
From: Charles GrybaRead Replies (2) | Respond to of 275872
 
A P3 with 1MB Cache and 400Mhz bus will outperform an Athlon XP at the same speed. We already know that 1MB Xeons were significantly faster than their 256KB P3 counterparts and they were stuck with a 100/133Mhz FSB instead of 400Mhz. I wouldn't be surpised to see the final version of banias use the 533Mhz FSB that's in the works for the P4. I don't think that banias will outperform a 166Mhz FSB 512K Barton but they will be at parity. What's unknown is whether mobile clawhammer can be out in the same timeframe as banias as that will be the better performing cpu.

C



To: hmaly who wrote (77850)4/21/2002 10:38:41 AM
From: combjellyRead Replies (2) | Respond to of 275872
 
"Do you are any feel that Banias at 1.6 ghz with 1 mb of cache added to the PIII will outperform AMD's expected offerings at that time"

It depends on what changes are made to the PIII core. First thing, getting information on the Banias core is a lot hit nailing Jello to a tree. First you hear one thing, and then there is another. The only thing we are more or less certain about is that Banias uses the P4 bus since they (supposedly) demo'd the chipset with a P4. if the only changes to the micro-architecture are doubling the cache line size (which they had to do for the P4 bus), a 1MByte L2 cache and the ability to shut down parts of the processor when idle (I presume this means more aggressively than they do now), then it isn't going to be all that impressive, unless your benchmark is a P4 at the same clock rate. Now if it has SSE2, then that could be an advantage.

As Van notes, the power consumption figures aren't all that impressive. An A4 is about the same speed and power consumption, albeit with a slower FSB and smaller L2. Now if I am not mistaken, the heatsink used on the pictured Banias on Van's site is a plastic one. An Athlon mobile XP may be faster and have the same power consumption. a Barton derivative will have close to the same total cache size, so the cache size won't make that much difference.



To: hmaly who wrote (77850)4/21/2002 11:21:14 AM
From: fyodor_Respond to of 275872
 
hmaly: Do you are any feel that Banias at 1.6 ghz with 1 mb of cache added to the PIII will outperform AMD's expected offerings at that time. Will a 1.6 ghz PIII with the improvement of a larger cache outperform a mobile Athlon at 1.6 ghz, and if so by how much. Tenchsutu promised us we would be surprised by Banias performance. Is this a good or bad surprise.

On the face of it, very disappointing.

However, I expect there are several surprises in store ;-)

Intel talked about integrating FireWire onto the Banias core sometime in the future. However, FireWire is located on the South Bridge and you don't integrate South Bridge components before North Bridge components.

In other words, I expect Banias to feature an integrated North Bridge, and possibly graphics core as well. This also fits well when you recall that Banias is being designed by the same team that developed Timna (integrated Rambus memory controller and graphics).

Seen in this light, the 24W @ 1.6GHz suddenly seems much more impressive.

-fyo



To: hmaly who wrote (77850)4/21/2002 7:21:13 PM
From: Joe NYCRespond to of 275872
 
Harry,

I think Piii with 1MB L2 at 1.6 GHz will outperform Athlon XP with 256K L2, that are 100 to 400 GHz faster. And I am not talking QS. Piii core was at parity, and in some cases a little faster than K7, even with lower available bandwidth.

Joe