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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (78644)	4/28/2002 12:09:30 PM
From: semiconeng	Respond to of 275872

B2L, I agree. I don't think we should try to compare AMD to Intel because no one has presented any data to accurately calculate Intel's defect density. I think the most reasonable explanation for AMD's low yields is not high defect density at all but binsplit. The design ran out of gas...... I recall when "another process" was in the same situation, when they were trying to "mine" extra speed out of an expiring design. The Etch and Litho Process Engineers were meeting on the Fab floor twice daily, to review the current, post etch - critical dimension data, so that they could refocuse/expose the steppers to hit the process targets dead on. It was a nightmare, constantly re-tweaking the process to get small amounts of high bin parts. Pain in the butt....... Semi

To: Elmer who wrote (78644)	4/28/2002 1:28:49 PM
From: Ali Chen	Respond to of 275872

"AMD's process is fine. It's the design that's the "problem", for lack of a better word. The .13u transistors on their .18u process was the first giveaway. They were pulling every single rabbit out of their fab hat just like Intel did with CuMine." Just like CuMine? Let's see: CuMine was 533-600 in 0.25, so it must be a no-brainer to get 1000 in 0.18. You failed to deliver what could be normally done. AMD K7 was designed for 600MHz on 0.25, so in theory it must get to 1200 on 0.18. They are shipping at 1700MHz now, or 40% above of theoretical target. "What would have happened to Intel's "yields" if the reverse had happened ... Intel would have had millions of parts too slow to sell." Didn't you just describe you own "1M Cumines per week" flood phenomenon? Geez, it took only a couple of years for you to admit your wrong... - Ali

To: Elmer who wrote (78644)	5/1/2002 2:03:00 AM
From: burn2learn	Respond to of 275872

B2L, I agree. I don't think we should try to compare AMD to Intel because no one has presented any data to accurately calculate Intel's defect density. I think the most reasonable explanation for AMD's low yields is not high defect density at all but binsplit. The design ran out of gas and AMD can't get very many parts at a marketable speed. That's the best explanation to cover all the facts. The slower parts are scrapped. Plain and simple. It doesn't require any mysterious rise in defect density or other fab issue. AMD's process is fine. It's the design that's the "problem", for lack of a better word. The .13u transistors on their .18u process was the first giveaway. They were pulling every single rabbit out of their fab hat just like Intel did with CuMine. P4 is running away from Athlon because it's a better design, just like Athlon ran away from CuMine. What would have happened to Intel's "yields" if the reverse had happened and AMD had all the fab capacity and Intel had a single modest fab and poor CuMine binsplits? Intel would have had millions of parts too slow to sell. We'd be looking at the fab output and wondering what the problem was. So my guess is that AMD's .18u process is healthy and probably always has been. As for their .13u process, well that's another story. This is good. I've seen many things posted on why AMD's yields are low and now maybe it can narrow. Lets break down shipped yields (die that actually get shipped) into 4 classes. 1. Litho loss - simply die lost to aggressive targeting of poly lines. 2. defect density - die lost due to defects 3. excursion material - die lost due to an abnormal excursion event. 4. wafer yield (line yield) - ins - outs for wafers Maybe the forum is on agreement and maybe Sanders is not lying. Could DD, excursion material and Line yield be world class, yet total shipped die is suffering due to aggressive poly targeting (litho loss). This is consistent in what the thread has been saying yet gets railroaded with terminology. Seems logical, does anyone know possible weightings of the loss modes I listed. Can someone say that it is possible that litho loss makes up X% of die loss if targeted aggressively? I can provide educated data but would prefer input.