Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: THE WATSONYOUTH who wrote (80979)	5/29/2002 9:37:05 PM
From: burn2learn	Respond to of 275872

Watsonyouth, Charles is doing fine, thanks. Here is what I see on process developments and tweaks. Everyone (process layer owner level) has their head in the sand and rarely does come up for air and look around at the rest of the world to see what's going on. All process development efforts and tweaks are started by a person who is trying to improve / fix / develop something, and maybe leave a mark in history...proof of worth. Usually the need is based on a company evolving product roadmap and you are tasked with trying to hit the moving target. It’s not bored idle engineers day- dreaming at their desk! Based on available time and personal desire you get the best a small team can come up with in a limited amount of time. Sometimes what the team / individual comes up with is not great when exposed to the stress of high volume manufacturing and requires more work. The choice you take when personally involved in an effort like this will vary with what you think you know about your current process compared to what's known of an alternative. Change is always a barrier to have to cross when trying to get a team to agree to a new process. You probably know process changes are not plug and play. It takes a mountain of data to prove a process is worthy for implementation and this data takes time and RESOURCES. It's hard to choose to wipe the slate and start fresh with no process characterization data once you have something that works. RIE trimming technique is one option but as we know sometimes even the best option does not always win. I bet you can relate to a time you had a great solution but failed to get support of the entire team. A don't know about the notch history so don't conclude I'm saying it was a poor option or was the option that RIE was trying to correct. It's all about the planets being aligned and having the right people in the right positions.....at the moment of time where it is needed. Follow up with me at the next eclipse. People are everything! Gate control does mean allot, I like what I see…do you? I hate spam

To: THE WATSONYOUTH who wrote (80979)	5/30/2002 1:40:19 AM
From: burn2learn	Respond to of 275872

Gate line width control is everything. You do what ever you need to optimize it The payback for being able to consistently work near minimum channel length with excellent within chip/chip to chip/ wafer to wafer/ and lot to lot control is enormous. There is nothing about the RIE trimming technique which is too slow or costly for high volume manufacturing. You are simply wrong there Hmmmm. I will simply state that the profile of a notched gate looks like what you might see with your RIE process upsidedown if you look at poly and a resist type film on top of it. Since you questioned the ability to replicate a uniform poly line with a notched gate but can do reduced poly lines with RIE trimming I want to ask a you to clarify for thread knowledge why; 1. given that both RIE trimming and notched gated occur in an etcher it's easier to control RIE trimming over notched poly. 2. why can't you get uniform results from a notched poly process. 3. How would your get notched poly gates, and how would you prevent it? Etch is a hobby of mine :) I will help fill in the blanks, but ask you to start since your questioned the ability of notched poly gates