Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: TGPTNDR who wrote (81236)	6/1/2002 5:16:38 PM
From: Win Smith	Read Replies (2) \| Respond to of 275872

Word size can mean a lot of things, so to start with, let's restrict it to what's necessary for reasonable physical memory addressability. Addressability is exponential in the number of bits; each added bit doubles the addressability. Moore's law, in the relatively optimistic doubling every 18 months form, eats up a bit every 18 month if applied to memory. e.g, we can expect memory density to double every 18 months and use 1 more bit of address space, at some fixed # of memory chip design point. So, the 32 extra bits going from 32 to 64 bit addressing should last 32*1.5 years, or 48 years. Now, there can always be some breakthrough or new paradigm, and there are other uses for "address" bits than pure physical addressing. But on the other hand, Moore's law as applied to silicon may well poop out long before 48 years from now. Predicting anything that far out is pure speculation; this article, for example, has Moore's law hitting a wall in 2015, but hypothesizes nanotechnology blasting past that wall and even accelerating things beyond that. eweek.com . At that level of speculation , if there's some new device paradigm that makes silicon obsolete, I'd hope there's some kind of computing paradigm shift to go with it that would make conventional numerical addressing irrelevant. The 64/128/256 bit graphics progression is, I think, just a memory bus width thing, where the PC bus has been 64 bits since Pentium and will be going 128 bits soon. The 4-8-16-32-64 microprocessor progression is a little deceptive, as 4-8 bits weren't really addressing limits. That progression, taken naively, is super-exponential in addressing, e.g. exp(exp(n)) for generation n in addressable memory size .