Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Microcap & Penny Stocks : Rat dog micro-cap picks... -- Ignore unavailable to you. Want to Upgrade?

To: Kathy Riley who wrote (8961)	8/8/2002 11:22:18 AM
From: Bucky Katt	Read Replies (2) \| Respond to of 48461

JMAR has huge, mega news, and of course, it is 'INVisible'> JMAR Announces Collaboration With MIT Professor Henry I. Smith, Leading Pioneer in Nanotechnology/Advanced Lithography SAN DIEGO--(BUSINESS WIRE)--Aug. 8, 2002--JMAR Technologies Inc. (Nasdaq:JMAR - News), a leading developer and supplier of precision systems for the semiconductor and nanotechnology industries, announced today that it has initiated a contractual collaboration in its advanced semiconductor lithography program with Professor Henry I. Smith, Ph.D., Director of the NanoStructures Laboratory (NSL) at the Massachusetts Institute of Technology (MIT) in Cambridge, Mass. Professor Smith, who holds the Keithley Chair in Electrical Engineering at MIT, is an internationally-recognized authority in the fields of nanotechnology and advanced semiconductor lithography. Under his contract, the terms of which were not disclosed, Professor Smith will work actively with JMAR scientists and engineers to facilitate the introduction of JMAR's new Collimated Plasma Lithography (CPL) system to the commercial marketplace. The product of more than 14 years of intensive research, CPL is designed to satisfy the semiconductor industry's near-term and long-term requirements for flexible, high-resolution lithography. JMAR's first CPL system is scheduled to begin preliminary testing and demonstrations next month. Earlier this year, Professor Smith worked with JMAR's research and development division, JMAR Research Inc. (JRI), to successfully demonstrate CPL's ability to produce high quality, sub-80-nanometer microcircuit features on silicon wafers. He also continues to play a key role in support of JMAR's advanced collimator development program. Integral to JMAR's CPL technology, collimators direct one-nanometer-wavelength light produced by the company's proprietary laser plasma light source onto a photomask containing the circuit designs, which are then transferred onto the semiconductor wafer. Professor Smith also continues to support JMAR with his well-known "process latitude" studies which are aimed at defining the manufacturing process steps and conditions required to achieve optimum production results. In addition, he is actively helping to evaluate novel concepts for producing higher performance photomasks and photoresists to enhance the production throughput and quality of the nanocircuits to be manufactured by JMAR's CPL. Commenting on his new relationship with JMAR, Professor Smith said, "I'm looking forward to jointly creating ever higher performing CPL systems with JMAR. Based on experimental results in my lab at MIT, I believe these systems can be extended to 25 nm features in a practical commercial lithography system. There's no doubt in my mind that CPL will easily outperform EUV lithography (which much of the semiconductor industry is currently counting on to meet its Next Generation Lithography requirements) and at a tiny fraction of the development and operational costs. I'm happy to bet my reputation on that."