Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Joe NYC who wrote (87428)	8/22/2002 12:21:32 AM
From: Joe NYC	Read Replies (2) \| Respond to of 275872

Here is a good one, slide 20: hypertransport.org Based on SPECInt2000 and pre-released x86-64 GCC compiler: Code size is up about 5% - Mostly due to 64-bit literals Instruction count is down about 15% - Additional registers really paying off - Many spill/fill memory references eliminated - Call-Exit sequences vastly improved Reduced instruction count and increased IPC provides substantial performance gains - 8th Generation Processor Core improves IPC about 5% - x86-64 instruction count down about 15% - Net improvement of about 20% for integer code - All without any specific code optimizations - Your mileage will vary Joe