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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (171562)	10/11/2002 12:27:47 PM
From: The Duke of URL©	Respond to of 186894

Itanium III -- cough, Madison -- taped out Volume chipments in 18 months? By Terry Shannon, in St Louis: Friday 11 October 2002, 16:40 AROUND 4,000 folk gathered in the America's Centre in St Louis to hear Curly Capellas bemoan the state of the economy, yet insist that the New HP was in great shape to emerge fighting once the recovery kicks in. Interested attendees at HP's Enterprise Technical Symposium 2002 heard tell of the latest goings on in HP's "High Performance Technical Computing" (HPTC) space including ProLiant 32-bit systems for Linux HPTC, and your choice of Alpha (Marvel) and IPF (Superdome) for high-end HPTC. McKinley is doing well in HPTC, the assembled faithful were told, with over 150 McKinley ISVs already offering products or trialling products in beta. For next year, HP promised an HP XC Supercomputer constructed of COTS IA32 or IA64-bit building blocks and sporting upwards of 32 CPUS into the many thousands. A wander round the hall suggests Marvel is on or ahead of schedule. Four implementations were spotted, one running VMS. The biggest configuration looks like sporting 64 CPUs, as opposed to 128 (but they'll build a 128 if you really want one). The performance is not yet fully characterized said one witness but it looks 'kick-ass'. Speaker Dr. Dileep Bhandarkar, Director of Intel's Enterprise Architecture Lab said Madison had taped out and the beta hardware was up and running. Look for 1.3 to 1.5x performance increase over McKinley by next summer, he suggested. Expect the normal 18 months between tape-out and volume revenue shipment of chips. Madison is expected to deliver 30-50 per cent better performance than McKinley at a 40-50 per cent frequency increase (estimated at between 1300and 1500MHz). Madison, or Itanium III, will be pin and application compatible with Itanium I and II but sport twice the cache (6MB three- level). Deerfield, which is a multiprocessor-focused variant of Madison, should be available in the same timeframe as Madison, Bhandarkar suggested. Next up -- in 2004 -- is Montecito in 90 nanometer process, with again a 40-50 per cent frequency increase. Performance should be damned good. Clock speed? Oh, about 2GHz, maybe a bit more. Bhandarkar wouldn't talk about 2005 Chivano, but it's being built at the Shrewsbury, MA facility, as we know, and will whip the ass of all competitors -- including, we reckon, POWER. µ See also: Madison, Deerfield to launch this time next year . Intel confirms 6MB of Madison cache All HPQ paths lead to Itanic