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Technology Stocks : Semi Equipment Analysis -- Ignore unavailable to you. Want to Upgrade?

To: Cary Salsberg who wrote (6369)	10/21/2002 11:26:22 PM
From: Mark Adams	Read Replies (2) \| Respond to of 95526

Cary, I don't have the in depth technical knowledge to know if line widths are an issue in GaAS processes. I understand yields are lower, which makes the same part more expensive to produce than a silicon based part. I use 'disruptive technology' under the concepts discussed in Innovators Dilemma. This is my spin on what I understood of what was said in the VTSS call. It boils down to volume, margins and time to market. The GaAs technology allows producers to create high speed parts at a higher cost, giving them a leg up on time to market for certain products. However, the R&D costs must be offset quickly, as improvements in CMOS processes will eventually capture the niche. This means GaAs producers are forced into a constant search for new applications that might ramp fast enough or have adequate volume to recoup R&D investment + production and fixed costs, and generate profits, before CMOS 'disrupts' their market in any particular application. I bring this up, as I'd thought GaAs and other specialized niches might be somewhat immune to the broader trends stimulated by DRAM/uP scale and what not. If bringing CMOS scale down (line widths), adding layers to shrink pathway lengths, SOI, Cu and what not, can advance CMOS technology into higher margin GaAs/SiGe space, then this 'moat' may not be quite as protective as I'd thought. Edit: Perhaps I should re-read that book. requiring a paradigm shift for producers may mean more than I originally intended. And may be correct. In VTSS's case, the discussion that brought this out centered on Fab vs Fabless business models.