To: Return to Sender who wrote (11453 ) 12/9/2002 7:59:16 PM From: SemiBull Respond to of 11555 IDT Strengthens Clock Management Portfolio with Its New Family of Zero Delay Buffers and Programmable Skew Devices Monday December 9, 7:45 am ET TeraClock(TM) Family Offers Industry's Broadest Capability for Translation Between I/O Standards; Industry-First Pin-to-Pin Compatible Devices Increases Designers' Flexibility SANTA CLARA, Calif.--(BUSINESS WIRE)--Dec. 9, 2002-- IDT(TM) (Integrated Device Technology, Inc.)(Nasdaq:IDTI - News), a leading communications IC company, today strengthened its clock management portfolio with the introduction of its TeraClock family of zero delay buffers and programmable skew devices. The devices provide the industry's broadest range of translation capabilities between I/O standards with five user-configurable single-ended or differential signal variants at the input and four signal variants at the output, as well as pin-to-pin compatibility for ease of migration between the zero delay buffer and programmable skew devices. In addition to offering significantly more combinations on input and outputs than alternative solutions, the IDT TeraClock devices also address design challenges by supporting the high-speed I/O standards required in next-generation communications applications, such as network routers, wireless 3G base stations and storage area networks (SANs). The IDT TeraClock devices offer several features that make them ideal for use in high-end communications applications. As the requirements for these applications demand high-integrity data transfers, the need for accurate clock signals becomes paramount. The IDT TeraClock devices provide reliable signals through its phase-locked loop capabilities, and capitalize on its redundant clock and hitless switchover feature to maintain and ensure overall system integrity and reliability in the event of a disruption in the system's main clock signal. Additionally, the IDT TeraClock family uniquely offers zero delay buffers and programmable skew devices that are pin-to-pin compatible, allowing designers the flexibility to easily migrate between the two devices to optimize for cost and performance. "The introduction of the IDT TeraClock family demonstrates our commitment to provide devices with high precision and unmatched performance characteristics, including unprecedented I/O translation capabilities needed for support of the high speed I/O protocols used in the communications market," said Sergis Mushell, strategic marketing manager for the IDT timing and logic product division. "The TeraClock zero delay buffers and programmable skew devices broaden our already-expansive clock management portfolio and further our ability to provide a complete clock tree solution to designers of next-generation communications equipment." The new IDT TeraClock devices operate at frequencies up to 250 MHz, making them ideal in high-speed applications, while offering 50ps cycle-to-cycle jitter and 100ps output to output skew. The IDT TeraClock products are available in single-ended 2.5-volt TTL, 1.8-volt LVTTL; differential 2.5-volt LVTTL, 1.8-volt LVTTL, HSTL, eHSTL and LVPECL; and pseudo-differential 2.5-volt TTL, 1.8-volt TTL, HSTL, eHSTL and LVPECL input signals, and HSTL, eHSTL or 1.8-volt/2.5-volt LVTTL outputs in various combinations. In addition to the noted input signals, the IDT programmable skew TeraClock devices also include programmable skew output signals. Pricing and Availability The IDT TeraClock zero delay buffer devices are sampling now with production starting in Q1CY03. The IDT TeraClock programmable skew devices will sample in January 2003 with production quantities available at the end of Q1CY03. Additional product information can be found on the IDT Web site at www.idt.com/products/clock_management.html. Download a high-resolution image of the IDT TeraClock device at www10.idt.com :81/pressroom/imagebank/products.cfm. -0- Unit Samples Production Pricing Part Number Product Pin/Package Available Available (10K units) --------------------------------------------------------------------- 5T2010 TeraClock 144-ball Now 2/2003 $4.50 single-ended BGA; 68- zero delay pin MLF buffer (VFQFPN) --------------------------------------------------------------------- 5T2110 TeraClock 144-ball Now 2/2003 $5.25 differential BGA; 68- zero delay pin MLF buffer (VFQFPN) --------------------------------------------------------------------- 5T9010 TeraClock 144-ball 1/2003 3/2003 $15.00 single-ended BGA programmable skew device --------------------------------------------------------------------- 5T9110 TeraClock 144-ball 1/2003 3/2003 $16.25 differential BGA programmable skew device --------------------------------------------------------------------- About IDT www.idt.com Note to Editors: IDT is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc. TeraClock is a trademark of Integrated Device Technology, Inc. All other brand, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. -------------------------------------------------------------------------------- Contact: IDT Corporate Communications Lindsay Okamoto, 408/492-8314 lindsay.okamoto@idt.com or Porter Novelli International Ricky Gradwohl, 408/369-1500 ricky.gradwohl@porternovelli.com -------------------------------------------------------------------------------- Source: Integrated Device Technology, Inc.