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To: fingolfen who wrote (172535)1/17/2003 2:03:05 PM
From: wanna_bmw  Respond to of 186894
 
Fingolfen, Re: <<AMD also said that Dresden would be able to produce 75 million hammers per year from the one FAB at the 90nm node.>>
Must have missed that in the CC... of course, AMD has a long history of hubris in their conference call (we'll have 30% MSS and hold it... etc.)


According to the summary on AMDZone, this was given a Hammer die size of 64mm^2, which suggests that AMD intends to continue using 256KB of L2 for their next generation. By then, I think that they will get lousy performance from such a small cache compared to the Intel equivalent that they will quickly have to design an option to include 1MB. That would of course increase the die size and subsequently change their capacity projections.

In short, I don't see AMD able to capture more than 15-20% of the market with their limited capacity, at least until they get to 300mm wafers in 2005 (if they manage to get there). Because of this, they will have to concentrate on improving ASPs and hope that the total available market increases from year to year as well.



To: fingolfen who wrote (172535)1/20/2003 8:42:50 AM
From: Dan3  Read Replies (2) | Respond to of 186894
 
Re: They're going to need to be to stay even remotely competitive.

Intel will have nothing but big, hot, incompatible Itanium and obsolete 32-bit P4/banias processors for at least a year after AMD is offering a consistent, compatible, 64-bit platform for everything from notebooks to enterprise SMP servers.

You might want to consider that Intel's "a little more of the same-old, same-old", strategy will probably not let them maintain $150 ASPs and 80%+ market share - and all that that implies.

Intel dodged a bullet when AMD had 3 month delay in the Hammers' release - but another one is coming.