To: Proud_Infidel who wrote (5168 ) 1/27/2003 7:47:43 PM From: Proud_Infidel Respond to of 25522 Full of remorse, Micron pins hopes on 0.11-micron tech By Anthony Cataldo EE Times (01/27/03 06:35 p.m. EST) BOISE, Idaho — Admitting they made mistakes that hurt their company's standing in an already poor DRAM market, Micron Technology Inc. executives told analysts that their company is once again poised to be the DRAM industry's low-cost manufacturing leader and would no longer lag competitors in introducing memory chips. In his opening comments at Micron's winter analyst meeting in Ketchum, Idaho, last week, chairman and chief executive officer Steven Appleton acknowledged a series of missteps that contributed to the company's poor financial performance last year. Last quarter, Micron reported a loss of $316 million. "There's no question our results over the last couple of quarters have been disappointing to us. I think we were caught off guard and I think you were caught off guard. All I can do is apologize for that," he said. Among the mea culpas were Micron's botched attempt to buy competitor Hynix Semiconductors Inc., and the addition of "inefficient capacity" when it acquired a sprawling fabrication facility in Manassas, Va. as part of its purchase of Toshiba Corp.'s DRAM operations, Appleton said. Perhaps most damaging was Micron's failure to deliver a 256-Mbit double-data-rate DRAM based on 0.13-micron process technology before competitors, Appleton said. "It turned out that was the sweet spot of the market," Appleton said. "At that time we made the decision to focus on 0.11[-micron products]. As a result that impacted us quite a bit." Still, company officials vowed that Micron will take the lead in moving to 0.11-micron design rules, which should represent 70 percent of Micron's total capacity by the first quarter of 2004. So far the company has seven 0.11-micron chip designs in the fab or in late stages of tapeout that are showing good yields. "We are well above where we are at in 0.13, at the wafer probe level," said chief technology officer Mark Durcan. Micron used its 0.11-micron process to build a 2.5-volt, 1-Gbit DRAM it fielded in December, essentially matching the development timetable of leading rival Samsung Electronics Co. Ltd. Micron usually lags competitors in introducing new high-density DRAMs, but now wants to deliver them earlier as a way to woo server manufacturers, said vice president of sales Mike Sadler. DRAMs using the latest design rules will also incorporate a new cell structure that adds an extra layer of metal and a bit line that's buried beneath the capacitor, shrinking the cell size. "This gives a 10 percent extra shrink on an equivalent process technology," Durcan said. To further contain manufacturing costs, Micron said it will squeeze more life out of its existing 248-nanometer lithography tools by leaning on its mask making operations. That should help the company delay the move to more advanced 193-nm lithography tools, though it's still unclear whether the company will need 193 nm for the most critical transistor-level masks. "Our photomask shop will drive 248 [nanometer] to the 0.11-micron node and to a significant extent — maybe exclusively — into the 95-nanometer node," Durcan said. "We don't think we need a lot of 193-[nm lithography] to get to 95-nanometer [designs]."