The MathWorks and Xilinx to Address Design Engineering Community At Inaugural Signal Processing Event
Wednesday March 19, 7:31 am ET
Jack Little, CEO of the MathWorks, and Wim Roelandts, CEO of Xilinx, to Drive Industry Dialogue at ISPC/GSPx
SAN JOSE, Calif., March 19
Who: Jack Little, CEO of The MathWorks, the world's leading developer
of technical computing software for engineers and scientists in
industry, government, and education; and Wim Roelandts, CEO of
Xilinx, Inc., the worldwide leader of programmable logic
solutions.
What: The MathWorks and Xilinx (Nasdaq: XLNX - News) to deliver joint keynote
address. Companies to sponsor, exhibit, and lead technical
sessions at inaugural signal processing conference.
Where: Global Signal Processing Expo and International Signal Processing
Conference at the Hotel Intercontinental in Dallas, Texas.
When: Monday, March 31, through Thursday, April 3, 2003.
The MathWorks and Xilinx today announced their extensive involvement in the first Global Signal Processing Expo and International Signal Processing Conference (GSPx and ISPC). Debuting this year, this groundbreaking event will address the industry's need for a forum focused entirely on signal-processing enabled technologies.
(Photo: newscom.com )
Since forming a strategic partnership in 2000, The MathWorks and Xilinx have been working together to further the adoption of high performance FPGA-based DSP technology. The MathWorks and Xilinx will build on this partnership by playing a key role in GSPx/ISPC, which brings together designers, engineers, software developers and other technical professionals to examine the explosive growth in the signal processing and system-level design markets.
Participation by The MathWorks and Xilinx includes:
-- Joint Keynote Address from Xilinx CEO, Wim Roelandts and The MathWorks
CEO,
Jack Little, Titled: "DSP Development Systems -- Breaking the
Moore's Law Barrier"
Wednesday April 2, 2003, 9:00 a.m. -- 10:00 a.m. (CST)
Wim Roelandts, CEO of Xilinx, will discuss the "coming of age" of FPGAs
for high performance digital signal processing applications. Fueled
largely by the ability of Moore's Law to provide massive parallelism in
programmable devices, the emergence of FPGAs for signal processing has
been well understood by those who create extremely high-performance DSP
designs. Not as well recognized is the need for development environments
to support this doubling of complexity every 18 months. Jack Little, CEO
of The MathWorks, will discuss solutions to address design challenges in
building high-performance signal processing systems with platform FPGAs
and custom hardware. This new generation of DSP development environments
brings together tools spanning the previously disjointed disciplines of
DSP, hardware design, and embedded software design.
Other sessions include:
-- DSP Workshop Tutorial: Design Methodologies for Signal Processing in
FPGAs with Dr. James Hwang of Xilinx
Monday, March 31, 1:30 p.m. -- 4:30 p.m. (CST)
Engineers will learn how to implement high-performance DSP designs on
the industry's most robust and easy to use design flow for FPGAs.
-- Technical Session led by Dr. Arun Mulpur of The MathWorks
Wednesday, April 2, 3:00 p.m. -- 5:00 p.m. (CST)
In this session entitled "Faster and Better Embedded Signal Processing
Systems: System-Level Design Begins to Pay-Off," Dr. Arun Mulpur of
The MathWorks will delve into the major phases of embedded signal
processing system development. Dr. Mulpur will walk attendees through
advanced system design concepts including fixed-point system design,
simulation and code generation, and will demonstrate the implementation
of signal processing systems on various platforms.
-- Panel Discussion: "The Future of DSP Engineering"
Wednesday, April 2, 1:00 p.m. -- 2:00 p.m. (CST)
Communications industry experts Dr. Colin Warwick, communication
product manager from The MathWorks, and Dr. Chris Dick, chief DSP
architect from Xilinx, will participate in a discussion on future
innovation in digital signal processing.
-- Xilinx Technical Paper Presentations
DSP experts from Xilinx will also present papers on the following
topics: Design Options for Carrier Synchronization in FPGA-based QAM
receivers; Highly Optimized Turbo Product Decoder with Hardware Test
Bench; Analysis of a JPEG2000 Encoder Implemented on a Platform FPGA;
A Modified Polyphase Transform with Arbitrary Re-sampling; and Design
Methodologies for Signal Processing in FPGAs. Paper presentation dates
and locations can be found at www.GSPx.com.
As event sponsors, The MathWorks and Xilinx will showcase their products in The MathWorks booth #216 and Xilinx booth #508. The MathWorks will demonstrate products and 3rd parties offering communications system simulation and DSP-design flow automation. Xilinx will demonstrate its MATLAB/Simulink-based DSP design flow using the System Generator for DSP v3.1 software platform and the Xilinx XtremeDSP Development Kit (hardware platform). Xilinx will also demonstrate its Embedded Development Kit -- an integrated environment with industry standard software tools and the Virtex-II Pro Evaluation Platform from Insight.
About The MathWorks
The MathWorks is the world's leading developer of technical computing software for engineers and scientists in industry, government, and education. With an extensive product set based on MATLAB and Simulink, The MathWorks provides software and services to solve challenging problems and accelerate innovation in automotive, aerospace, communications, financial services, biotechnology, electronics, instrumentation, process, and other industries.
The MathWorks was founded in 1984 and employs more than 1000 people worldwide, with headquarters in Natick, Massachusetts. For additional information, visit www.mathworks.com.
About Xilinx
Xilinx, Inc. is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.
NOTE: MATLAB, Simulink, Stateflow, Handle Graphics, and Real-Time Workshop are registered trademarks, and TargetBox is a trademark of The MathWorks, Inc. Other product or brand names are trademarks or registered trademarks of their respective holders.
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Source: Xilinx |
