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To: SemiBull who wrote (2742)3/25/2003 7:00:46 PM
From: SemiBull  Read Replies (1) | Respond to of 2754
 
The future of batch and single-wafer processing in wafer cleaning

By Scott Becker, Semiconductor Business News
Mar 24, 2003 (5:10 PM)

URL: siliconstrategies.com

The following executive comment was provided by Scott Becker, vice president of product management of FSI International Inc.'s Surface Conditioning Division. Based in Minneapolis, FSI International is a supplier of semiconductor equipment for surface conditioning applications.

Wafer cleaning is the most frequently repeated step in IC manufacturing, and the market is forecasted to grow from $1.1 billion in 2003, to about $1.5 billion in 2004.

Cleaning is the only remaining process step still dominated by batch product technologies, including immersion and spray. Implementation of single wafer techniques in other process areas has delivered improved process performance and productivity. Because of this, the industry is eager to use single wafer equipment to realize the same benefits in surface preparation.

In 2001, single wafer cleaning equipment generated approximately $300 million in revenue out of a $1.6 billion market. Less than half of this was for particle removal tools such as scrubbers and cryogenic aerosol equipment while a little more than half was for single wafer spin etchers (SWS).

There has been a lot written about SWS equipment taking market share from batch cleaning tools. However, according to independent industry analysts such as Dataquest, SWS are forecasted to account for no more than 15 percent of cleaning equipment purchases in the next cycle.

The emergence and extent of adoption of SWS bear significant implications on the industry. From the IC manufacturer's perspective, adopting a new technology requires a careful balance between risk and reward. Batch wafer cleaning has, for the most part, delivered satisfactory process and productivity results.

Thus, if SWS is to be widely adopted, it must be either an enabling solution to a technology roadblock or deliver dramatically better productivity results than mature batch technologies for the current applications. Either way the benefits must unequivocally outweigh the risk.

New challenges for wafer cleaning

Several challenges have arisen for wafer cleaning due to the evolution to new materials and smaller geometries in IC manufacturing. These hot topics include damage-free cleaning of gates, cleaning low-k dielectrics without altering the k-value, and high-k dielectrics processing. These challenges are drawing interest from both batch and SWS suppliers.

In terms of productivity, the greatest benefit of SWS is short cycle time. Some suppliers have predicated that switching to all single-wafer processing saves fabs 40 percent or more in overall manufacturing cycle time. Cycle time, however, is only one of many aspects of productivity, and because SWS has lower throughput, more tools need to be purchased for such a fab, leading to higher capital cost and factory footprint. IC manufacturers, as well as equipment suppliers, are attempting to determine if SWS can be profitably applied.

Processing steps: FEOL and BEOL

Wafer cleaning can be segmented into a number of applications, as shown in Table 1 (See below), where we have modeled the number of steps for each application based on the needs of typical 300mm/90nm, volume-production.

The descriptor “FEOL” stands for front-end-of-line and refers to processing steps to build the transistor; similarly, the descriptor “BEOL” stands for back-end-of-line and refers to processing steps to build the interconnects.

Meanwhile, the difference in FEOL and BEOL lies in the presence of exposed metal in BEOL and the composition of residues encountered. Because of this, strong acid and base solutions can be employed only in the FEOL. Typically, there are 50 FEOL cleaning steps and 50 BEOL cleaning steps in advanced fabs.

The choice between single wafer and batch techniques depends on process capability first and productivity second. Single wafer spin etching has not yet demonstrated the broad process capabilities necessary to address all the diverse applications.

FEOL to the rescue

FEOL cleaning consists of the following applications:

Particle Removal cleans wafers after thin film deposition and before lithography to ensure a planar surface.

Critical Clean is required before each diffusion and deposition step to remove contaminants and create the ideal surface state for the next process.

Photoresist Strip and Post-Ash Clean are performed after pattern formation and ion implantation to remove either the photoresist masks or the residues remaining after the mask is ashed.

Film Strip removes a variety of bulk sacrificial films, including oxide, nitride, and various metal films.

FEOL Particle Removal (7 percent of cleaning) is most commonly performed using either a Batch Immersion tool with megasonic energy or a Single Wafer Scrubber. Both techniques have been known to damage narrow gate structures. So there is an opportunity for new techniques with effective particle removal that don't damage these sensitive structures. This has prompted the evaluation of Cryogenic and SWS techniques. It is too early to tell if either will gain a major position in this area.

The FEOL Critical Cleans (20 percent of cleaning) are dominated by batch systems (wet bench) because they offer robust processes utilizing traditional chemistries with megasonic energy for particle removal and IPA assisted rinse-dry processes for excellent particle and water mark performance. Several suppliers are attempting to implement these technologies on single wafer platforms. In order to achieve reasonable process cycle times, new chemistries have been developed. It remains to be seen how technically successful and productive these new platforms and their innovative processes will be.

Table 2 (See below) shows a comparison of the smallest available single wafer tool with megasonics, but no IPA technology, to a traditional wet bench as well as a state-of-the-art reduced cycle time wet bench. From this it can be seen that if SWS can develop a robust critical clean process it will offer attractive short cycle times for small lot sizes. However, for volume manufacturing, the reduced cycle time wet bench will consume 65 percent less floor space at 70 percent less cost than the SWS approach.

The FEOL Post Ash Cleans (20 percent of cleaning) is also dominated by batch systems (spray and immersion) because they utilize chemical sequences employing hydrogen peroxide mixtures of sulfuric acid and ammonium hydroxide. These chemistries and their long process times render them impractical for use on SWS equipment. Substantial changes would need to occur in either the preceding process step or in the cleaning chemistry to overcome this obstacle. Therefore, batch equipment should retain a leadership in this area for the foreseeable future.

FEOL Film Strips (3 percent of cleaning) are the removal of silicon nitride, silicon dioxide and metal silicide films. The nitride and silicide films are etched by batch techniques because they use hot concentrated chemicals with long process times. There have been no reports of implementing single wafer techniques in manufacturing for these steps.

SWS is standard for only 12 percent of wafer cleaning, consisting of FEOL Backside Film Strips and BEOL Backside/Bevel cleans. These applications require side-selective processing and can only be performed using single wafer spin etchers, since batch technologies subject both sides of the wafer to the same treatment. Near-term growth for these applications is expected. However, copper deposition tools have integrated this capability on their platforms. It is reasonable to expect that backside particle cleans will also be integrated into the photolithography work cells.

Don't forget about BEOL

BEOL cleaning consists of the following applications:

Particle Removal cleans wafers before and after thin film deposition and before lithography to ensure a planar surface.

Post-Ash Clean is performed after pattern formation and ion implantation to remove the residues remaining after the mask is ashed.

Backside/Bevel Clean is used mostly to remove excess copper from the back and edges of the wafer.

BEOL Post Ash Cleans (20 percent of cleaning) is successfully performed in either Batch or SWS systems. For small lot sizes single wafer does offer cycle time advantages. For larger lot sizes the two techniques offer comparable cycle times. In a large production environment, SWS will consume three times the floor space at twice the cost, as shown in Table 3. (See below)

Brush scrubbers have dominated BEOL Particle Removal (20 percent of cleaning), which is a single wafer technique. However, there are newer single wafer techniques such as brush-less scrubbers and cryogenic aerosols that are gaining momentum on copper-low K materials. At this time it doesn't appear that the single wafer techniques based on spin etching is gaining ground in this application.

It is clear that there is a lot of interest in single wafer cleaning technologies. In particular SWS cleaning has made significant gains in backside and side-selective applications. Today SWS accounts for less than 15 percent of all cleaning equipment revenues. For FEOL applications, it does not appear that SWS will solve its process capability challenges and become qualified for production prior to the next upturn. Near-term growth for SWS can be expected in BEOL Backside/bevel Cleans, which will eventually be lost to integrated solutions.

The largest growth opportunities for SWS is BEOL Post Ash cleans with those fabs that value cycle time reductions for small batch sizes. No doubt SWS will continue to grow, however it is unlikely that it will be greater than 20 percent of the cleaning market in the next several years.

Tables