UMC vows to uphold technical edge
By Mike Clendenin
EE Times
(06/16/03 05:49 p.m. EST)
Taipei, Taiwan - United Microelectronics Corp.'s chief technologist is defending his company's status as a technology leader, asserting that UMC is as good as any at 90-nanometer manufacturing and is pushing aggressively on 65-nm R&D.
UMC hopes to counter a perception that it isn't prepared to battle rival Taiwan Semiconductor Manufacturing Co., and now IBM Corp., as the foundry industry prepares to tackle daunting challenges in deep-submicron technology. UMC's recent strategy shift, which focuses on "manufacturable" technology and involves equity investment in some of its customers, was interpreted by some as a circling of the wagons to conserve resources.
That was followed by the cancellation of its annual technology conferences in the United States, Europe and Asia, and a quiet period in which UMC deflected requests to talk about its technology plans in any great detail. In an interview with EE Times, Sun Shih-wei acknowledged a few missteps in getting the company's message out but said, bluntly, "We are not pulling back on R&D. We are actually stepping on the gas pedal for full speed."
The company has only one high-profile corporate partnership in R&D, with Infineon Technologies AG. Advanced Micro Devices Inc.'s defection to IBM cost UMC a research partner, especially in the area of silicon-on-insulator (SOI) technology.
Sun is adamant, though, that UMC will continue to be a technology leader. But the company doesn't want to be on the "bleeding" edge, he said, when the leading edge is good enough for its customers. Mike Ma, a department manager in UMC's advanced R&D division, likens key competitors to chefs who prepare a full spread of gourmet dishes, and then wait to see what diners actually eat. "What we are doing is asking customers what they want. They still want luxury food, but they preorder," he said.
Time will tell if UMC is making the right move. Right now, it is still smarting from a decision made a few years ago to focus on communications chips. One of the reasons TSMC has pulled further ahead in the last year, in terms of revenue and profit, is because of the computing sector, in particular PC graphics chip designer Nvidia Corp., which helped shelter TSMC from the anemic performance of the comms sector.
When 90 nm starts to take off, however, Sun believes that UMC will get its due. And on 65 nm, he said, the company is deep into its research. Beyond that, teams are looking into everything from low-k and high-k materials to 3-D transistor structures, strained silicon and SOI.
Asked if the company is leaning toward using 157-nm lithography tools or jumping to extreme ultraviolet, as Intel Corp. recently said it would do, Sun demurred, saying this issue is an example of a "bleeding-edge" debate. UMC will wait for industry consensus, he said, rather than spend tens of millions on research or soak up time by tweaking immature tools.
"It's about manufacturability," he said. "We aren't making a lot of PR efforts. We are coming in, day in and day out, driving R&D for our customers." In the past six months, progress has accelerated, he said. "If you are talking about the real business, the meat, at 90 nm, we have very good yield compared to IBM and we know how our neighbors are doing."
At 65 nm, Sun said UMC plans a two-phase approach on low-k dielectric materials. The first will see k-values of 2.9 to 2.7, using chemical vapor deposition-based materials it used at 90 nm, such as Novellus' Coral. In phase two, UMC hopes to go below 2.5, also using a CVD material.
UMC is leaning away from a spin-on approach, such as Dow Chemical's SiLK material, which it abandoned more than a year ago, citing issues with the coefficient of thermal expansion.
In high-k materials, Sun agreed with a Motorola Inc. assessment that high-k gate oxides will likely debut in tandem with metal electrodes, displacing doped polysilicon gate electrodes with nickel silicide. Regarding SOI vs. strained silicon, UMC has focused on rolling out strained silicon first. The company last week announced a partnership with AmberWave Systems to engineer a strained-silicon process. |
