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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: niceguy767 who wrote (103279)	10/20/2003 8:18:06 AM
From: Dan3	Respond to of 275872

Interesting article on spec scores and cache sizes: We define the Cache efficiency here as 100% if four processors finish just as fast as a single processor. Cache efficiency is said to be "0%" if four processors take four times as long to finish the benchmark: This means that the run-time is entirely determined by the throughput of the single memory controller. We give the performance ratio's for one and four processor configurations. The ratio should be 1.5 (1500/1000) if the application fits entirely in the caches. It should be higher than 1.5 if it fits better in the 6.0 MByte cache than in the 3.0 MByte cache. The ratio is lower than 1.5 if the memory controller becomes a bottleneck. A ratio of 1.0 effectively means that the performance is entirely determined by the memory controller throughput: 1000 MHz processors run just as fast as the 1500 MHz processors. Some small differences are due fact that a newer version of the compiler is used for the 1500 MHz Itanium 2 configurations. More at: chip-architect.com