SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: ptanner who wrote (103478)10/22/2003 2:30:58 AM
From: Joe NYCRead Replies (1) | Respond to of 275872
 
PT,

I don't want to be right about this nor to keep harping on it. But the memory benefits will be hard for anyone to realize if the near-term motherboards will never support this level.

I think the motherboards (and their BIOSs) are basing this their assumptions on memory chips size of 512Mbit. Maybe because they have some engineering samples, I don't know, but we need 1 Gbit chip to break through the 4 GB barrier on the desktop. It would mean 4 ot 6 GB on Socket 754 CPUs and 8 GB on Socket 939 CPUs.

Opterons should already be able to achieve 8 GB with 4 DIMM per channel registered, each DIMM containing 2 GB, and it is possible with 512Gbit memory chips on DIMMs. It will go to 16GB max per CPU with 1Gbit memory chips in registered DIMMs.

As far as chipset stuff related to memory capacity... aren't a lot of devices allowed DMA which are connected to the chipset rather than directly to the CPU (and its memory controller)?

I am not sure how that would impose any limit. The transfers to CPU are done over HT link.

Joe



To: ptanner who wrote (103478)10/22/2003 12:22:44 PM
From: dougSF30Read Replies (1) | Respond to of 275872
 
PT-

> As far as chipset stuff related to memory capacity... aren't a lot of devices allowed DMA which are connected to the chipset rather than directly to the CPU (and its memory controller)?

My impression is that there are no longer any traces between memory and the chipset. That is, memory is connected ONLY to the CPU memory-controller, and any DMA would stream from device to chipset to CPU controller (via HyperTransport) to Memory and back.

But I don't know for sure.

Doug