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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: j3pflynn who wrote (139111)	11/8/2004 7:53:25 PM
From: niceguy767	Respond to of 275872

"I'm tickled it's finally panning out; I'm just saying don't expect anything productive out of the ORNAND thing anytime soon." I know! Just like Opteron!

To: j3pflynn who wrote (139111)	11/8/2004 9:41:18 PM
From: dougSF30	Respond to of 275872

Both a recent analyst report and this Spansion PR appear to hint at problems recently overcome with MirrorBit. Here's the bit from today's PR: "Now that Spansion has been able to solve some of the inherent scaling and performance problems with nitride-based technology, its new 'ORNAND' architecture is truly a breakthrough," said Alan Niebel, CEO and founder of semiconductor market analysis firm Web-Feet Research. Here's an article from 18 months ago that mentions more about "nitride-based technology": Intel's StrataFlash, AMD's MirrorBit, and More As with most silicon-based businesses, Intel has seized a big part of the flash-memory market. The CPU giant also offers its own improved version, called StrataFlash, which uses what Intel calls multilevel cell (MLC) technology to double the capacity per chip, using four levels of charge to store two bits per cell. Manufactured using 0.25- and 0.18-micron processes and available in densities from 32Mb to 128Mb, StrataFlash is according to Intel the highest-density NOR-based flash available today. AMD's and Fujitsu's MirrorBit scheme offers a similar if more ambitious technology that traps multiple nodes or pockets of electrons in a nitride layer under a bi-directional gate. By cramming first two and then four bits into a cell, the AMD technology could squeeze more life from current RAM production processes. Motorola is working on a similar type of technology called SONOS (silicon-oxide-nitride-oxide-silicon.) "SONOS and MirrorBit offer a third class of memory that can challenge NAND and NOR," says Motorola's Chang. While it started shipping 2-bits-per-cell MirrorBit flash chips last summer, however, AMD has not yet begun to ship 4-bits-per-cell products. And rivals suggest that the signaling involved in storing so many bits is too complicated for mass production. Meanwhile, the challenges of conventional flash memory manufacturing are looming. Just as with CPU factories moving from 0.18- to 0.13-micron and then 90-nanometer process architecture, improved lithographic processes let memory makers build chips with smaller gates, increasing the amount of data that can be stored on each chip. But flash technology is heading for the same physical bottlenecks. In the latest flash memory chips, the layer of silicon dioxide that "floats" on top of the gates and keeps the electrons from dissipating is approximately 90 angstroms thick (nine billionths of a meter). When manufacturers reach 80 angstroms, which they could do as early as 2004, it will be difficult to keep the electrons in place without seeping through the silicon layer, which would cause the gates to lose their charge. Industry analysts suspect that flash memory production will hit a wall when it reaches 45-nanometer processes -- which Intel's latest roadmap has scheduled for 2007. To break through this barrier, memory manufacturers are investing heavily in a range of exotic new technologies, ranging from nanocrystals and ovionics to MRAM and FeRAM. Next week, we'll check on the progress of those efforts and see which memory designs will be remembered years from now. cpuplanet.com Doug