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To: burn2learn who wrote (147533)	1/12/2005 12:13:47 AM
From: etchmeister	Read Replies (1) \| Respond to of 275872

2. It's not trivial to transfer a process. Intel sends hundreds of engineers to PTD in OR for a year to get the process transfer down. The AMD 65 nm PE's can't work on this, you need another set. The process since the change for AMD is 300mm and 90nm, the IBM process would require learning's. COPY EXACTLY the complete layout of facilities is copied and proliferated to other manufacturing plants There could also "political obstacles" materialize: For example AMD 36 uses etcher X while IBM uses etcher Y. AMD 36 is fairly happy with etcher X after evaluating etcher X and Y. Now if AMD is "truely" transferring the process they would need to select etcher Y against their opinion. (I guess it depends how much input AMD had while IBM developed the process) These are small, tedious things but as you stated NOT trivial at all. I'm not saying AMD can't do good job but all those things need to be considered when defining the time line. Of course only my 2 cents Intel makes all those decisions at one central location and than proliferates, dictates toolsets to the manufacturing plants.

To: burn2learn who wrote (147533)	1/12/2005 12:22:13 AM
From: Joe NYC	Read Replies (1) \| Respond to of 275872

b2l, Who is going to qual the tools and ramp the 90nm process for 300nm at Fab 36? I imagine that some of the experienced process engineers from Fab 30 Dresden have been sent to East Fishkill and they will be doing the qualification of the tools 5. It's spring and your now ramping slowly 90nm parts. But wait! Your 65nm engineers at IBM just showed up in the fall and need to requal the tools for 65nm AMD has had process engineers at IBM for some 2 years doing joint 65nm process development. I don't know if these would be the same people to qualify the tools. I am way too far away for this level of detail to really have any idea. Because the fab ramps tool availability over time, there is not another "line" of tools to do this on. Go to step 3. AMD has been doing this for years in Dresden. 180nm -> 130nm -> 130nm SOI ->90 nm SOI. All while production was taking place under several technologies (currently it could be last 3 of the ones I mentioned) It is not really anything new for AMD. They have been able to manage in the past. It's best to wait for 65nm PE's from IBM to return and ramp. I think that level of risk is unacceptable. It may be acceptable risk for Intel's one of many fabs, but not for AMD. As far as qualifying tools, you said there is some overlap, so the effort will not be totally wasted. As far as optimising layout for IBM's 90nm, it has been planned for some time, and the effort will not be wasted, since it will be used at Chartered (90nm SOI, 300mm), BTW, using AMD licensed APM, as well as most likely for initial production at Fab 36. Joe