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To: Joe NYC who wrote (189120)3/8/2006 7:36:40 PM
From: eracerRespond to of 275872
 
Re: I think what eracer was trying to say is that if you get a performance increase due to low latency DDR2-800 (alone) of p1 percent, and performance increase due to cache size increase (alone) of p2 percent, both of the enhancement will not increase the performance by p1 * p2, but a little less, because there is some overalap between these 2 enhancements.

You are correct. I'll give you the links to what I actually said rather than Doug's inaccurate paraphrasing:

Message 22239274

The 4MB L3 cache should help quite a bit in certain games and a few other apps. The on-die memory controller and high bandwidth DDR2-800 are going to limit its effect though. It is a short term crutch, but is not going to give the type of consistent gains in a variety of benchmarks that an improved architecture would deliver.

siliconinvestor.com

I don't feel that any of the encoding benchmarks are cache limited. Anantech's second Yonah performance review compared a X2 3800+ with 512KBx2 to an Opterton/Athlon 64 with 1MBx2 also clocked at 2GHz. There were no significant performance differences between the two in the encoding benchmarks. I don't feel adding 4MB of L3 to Athlon 64, or more cache to Conroe, would do much to improve performance in the few encoding benchmarks tested.

Games tend to respond favorably to more cache. It should be more important in the cases like SMP Quake 4 where both cores are used heavily and 4MB of L2 should get split more equally between the two cores. Even so I feel the large Conroe L2 cache was a relatively minor part of the overall performance increase seen.



To: Joe NYC who wrote (189120)3/8/2006 7:46:24 PM
From: firthoffourthRead Replies (2) | Respond to of 275872
 
Will the K8L require a new socket, or will it drop into AM2/socket f etc...?



To: Joe NYC who wrote (189120)3/8/2006 8:15:50 PM
From: dougSF30Read Replies (1) | Respond to of 275872
 
Joe, the amusing part was that he first claimed your "p1" was zero, and then, when the issue of "p2" was brought up, decided that p1 must be large, in order to make for the highest overlap, and thus the least benefit.

I don't think AMD necessarily needs the K8L to regain the lead. A high enough frequency Rev F, together with extra L3 cache (likely responsibly for a good portion of the performance Intel showed) might tie or pull ahead. Of course, if the Inq is to be believed, the K8L will open up a 50% lead on FP.