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To: dougSF30 who wrote (196911)	5/15/2006 5:29:22 PM
From: combjelly	Read Replies (1) \| Respond to of 275872

"You don't seem to have any sources that substantiate specific claims like "4 times the risk"," You ever do risk assessment? When you have two risk factors that interact, you multiply the risk, not add them. If you think that gate material and gate insulator don't interact, well... True, I might be wrong in weighting both with equal risk factors. But I suspect they are pretty close. Ok Dougie, here is the skinny. If they aren't using novel materials and are sticking with SiO2 for the gate insulator, then they have to be using a thick oxide layer. Because the leakage is because the SiO2 on the gate is approaching a couple of molecules. That is physics, there isn't any way around it. No amount of process magic will change that. But making the gate oxide thicker means it switches slower. That is the tradeoff. So sure, they can reduce leakage to zero. But that means they probably won't break 1 GHz. Wanna bet they choose to go with a 20% faster transistor, which sort of sucks BTW, instead of low power? Really dougie, you are pretty clueless about this stuff. Do ty to get a clue before playing again.

To: dougSF30 who wrote (196911)	5/15/2006 5:47:59 PM
From: Hans de Vries	Read Replies (1) \| Respond to of 275872

Re:As of early this year, they are calling for 5x lower leakage. Leakage is just part of the problem. Intel's low power 65nm process has a leakage 3 orders of magnitude lower than the 65 nm process they use for their processors. It comes at the expense of the performance though. The Intel source you quote says: More than 20 percent improvement in transistor switching speed or more than a five-fold reduction in transistor current leakage. intel.com So it's one or the other. Five times reduction in leakage means no performance improvement over 65nm. btw: here's the high-k/metal gate stuff for higher performance combined with low leakage: intel.com intel.com Regards, Hans