To: pgerassi who wrote (199794 ) 6/1/2006 12:04:34 PM From: Joe NYC Read Replies (1) | Respond to pete,But that is also the plight of memory channels, they cannot both receive and transmit 12.8GB/s. They only go one way at a time. And then there is the overhead in both types of links. Memory typically has more overhead than HT. that standard 16/16 HT link can be made asymmetric like 24/8 which would increase say read BW to 15.6GB/s, but lower write BW to 5.2GB/s. 5.2GB/s is quite a bit faster than the current HT 2.0 16/16 link at 2MT/s of 4GB/s down. I don't know however if the HT 3.0 version allows dynamic link width changes. It would likely require 4-5 additional pins, but would allow the link to go to 30/2 for 19.5GB/s/1.3GB/s BWs. That would accommodate most low end GPUs. Lets face it, 2D work just isn't that BW intensive which is used for most GUIs. Even 2048x1536x32 uses only 12MB per frame. A 1.3GB/s link can easily accommodate over 100FPS which is higher than most refresh rates. 4GB/s can do 330FPS. With modest amounts of cache, low end 3D GPUs don't use that much memory BW. For any medium or high end GPU, it would use local memory anyway. Even if it was plugged into an AM2 socket, 12.8GB/s would be the equivalent of 256 bit wide memory at 400MHz. And that "local" memory could be used by the CPU in the other socket. Personally though I would agree that 2 HT 16/16 links should be the minimum for any enthusiast CPU socket(s). The additional pins used for separate DDR(2) address and command pins should only needed to remove one HT 16/16 link and not two from the socket 940 to 939 transition. There should be enough room in AM2 to accommodate one additional HT 16/16 link.
