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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Rink who wrote (201637)	6/12/2006 9:23:03 AM
From: j3pflynn	Read Replies (1) \| Respond to of 275872

Rink - Which unknown author? Josh Walrath? His site is here: penstarsys.com

To: Rink who wrote (201637)	6/13/2006 8:01:05 AM
From: Rink	Respond to of 275872

(EDITED) Hans on rev G: >Hans, > >I'd much appreciate it if you could have a look at these two posts and tell us >what you think of the latter. Hope you don't mind... It's about that rev G die photo >that was discarded by AMD. It might well have appeared again in the June 1 analyst >presentation. I think it potentially can mean that rev G is not a dumb shrink. > >Regards, > >Rink Rink, I posted a reaction on this on aces here: aceshardware.com The blue core uses all new megacells from the IBM alliance. These are mostly small memories and register files used throughout the core. The blue core is therefore a complete new layout. It's more like an early "Rev.H" without second FP unit. An "optical" shrink means literally using the same mask-set but with a different "zoom" factor. Now that's not possible anymore with current technology, masks must always be re-adjusted when the wave-length of the exposure light doesn't scale with the same "zoom" factor. (just to give one reason) Reading Hiroshige Goto's interview with Dirk Meyer and Phil Hester one would include that Rev.G is indeed an "near optical" shrink. Well that's for the core I presume and not for the L2 cache and the I/O. babelfish.altavista.com It's all a question of risk assessment and time to market, A dumb shrink will probably reach acceptable speed earlier than a complete new layout. I would expect Rev.G to look more like the die plot of the "next generation mobile core" here: epscontest.com The cores here are "near optical shrinks" while the L2 cache has a higher density. There is also lots of new unknown stuff in the greatly enlarged memory I/O block which may or may not be there in Rev.G. The only hope for design improvements for Rev.G would be improved prefetching which is located in the memory I/O interface block. With single core 130nm parts reaching 2.6GHz and dual core 90nm being too power constrained to go beyond 3.2 / 3.4 GHz the hope for AMD would be that 65nm removes the power constrains so they can go, eventually, for significantly higher speed dual cores. It has an inherent advantage in that Conroe's core seems to be about 70% larger as the K8L but that has to be translated to a performance/power advantage with the right process technology. The other short term remedy is the arrival of low latency DIMM's with CL's in the order of 8ns down to 6,7ns which greatly improve the performance of the AM2 line. In my opinion the performance is largely determined by how low you can get the memory access. That means: 1) advanced prefetching. 2) Integrated Memory interface is a big plus but clearly not enough (which may have surprised AMD) 3) Large Cache is not really needed but continues to provide and easy advantage for fraudulent benchmarking. Regards, Hans realworldtech.com Interesting. Possibly better prefetching + denser cache + 65nm + better power benefits. This will sure help a lot in mix. Better late '06 than never. EDIT: Hans per his first link also mentions that he believes that the empty place we speculated might contain L3 is really empty (no transistors there). He doesn't agree with my speculation that the 'discarded' core might close to rev G. Instead he mentions that mobile core layout as more likely design target for rev G. I don't know what to think at this moment; I just hope that prefetching does improve as this will help performance somewhat significantly and hence also ASP's. Regards, Rink