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To: TGPTNDR who wrote (207533)8/3/2006 11:17:46 PM
From: combjellyRead Replies (2) | Respond to of 275872
 
"Defect density determins[sic] yield One part. There are several other things that determine yield."

He is talking in the classical sense. In that case, defect density was the determining factor. But those were the days when design features were larger than the wavelength of light used to produce them and patterned features tended to be rectangles...

As you have alluded to, things have changed. Here is a paper on why ramps can be slowed with smaller features.

eetimes.com



To: TGPTNDR who wrote (207533)8/4/2006 12:29:31 AM
From: Elmer PhudRead Replies (1) | Respond to of 275872
 
To the thread: I have no real desire to take this tone with anyone but I didn't draw the first blood here. I have a right to defend myself against such utter ignorant nonsense.

TGPTNDR

I normally ignore your posts but CJ quoted you quoting me. I haven't spent 25 years developing test capability for 100s and 100s of millions of parts (most of which the name you would recognize) just to argue with someone like you but you are truly clueless on these matters.

You quote me: Not true. If the process is already in HVM then there is no reason why a new product would yield lower than extected compared to other products already in production. Keep in mind that the new product is almost certainly on more than 1 mask revision when it's qualified for production. Defect density determins yield and it doesn't know which product is running or how many wafers have already been produced.

If the process is already in HVM --


You say: It isn't in HVM if it's just starting out. That's why normal ramp is doubling each Q after introduction.

Intel's 1264 65nm process has been in HVM since last year. Yohan, CedarMill and Pentium D have been shipping in high volume for a long time now. How can you make such a silly statement? Yields for new products on that same process should follow the exact same yield curve the other HVM products already enjoy. That's determined by defect density which is dominated by particles as the first order effect. I hope I'm not revealing any inside information here because maybe other Fabs have other greater first order effects? TWY posted something a while back that strongly suggested that by his yield estimates for another product. So even though it's over your head, a particle doesn't know if it has fallen on a Yonah or a Conroe, a Woodcrest or a Merom. You obviously have no understanding of this matter so you shouldn't put your ignorance on display. How many Fabs do you monitor on a daily basic? How many products have you brought into production? How many 100s of millions of parts have they shipped?

You quote me Keep in mind that the new product is almost certainly on more than 1 mask revision when it's qualified for production.

You say -- there was a time when this *####* argued that first silicon couldn't be run or tested.

I don't know what a "####" is but you continue to make no sense at all. Why couldn't you test or run new silicon? Assuming it isn't misprocessed (I haven't seen a misprocessed first silicon lot in nearly 20 years) if there is a bug in the silicon then there is a bug in the RTL. The test vectors come from the RTL (usually) so the silicon matches the test vectors, bugs and all. Buggy parts test just as easily as bug free parts. If you had any experience in the field you'd have known that. Defect free new silicon goes to a validation lab where it is evaluated.

Put completely nonsensical statements together and you've got an ephud post.

Obviously they are nonsensical to you because you have no idea what you're talking about. You just take cheap shots behind people's back.