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To: FJB who wrote (218962)	12/5/2006 12:49:07 PM
From: cruzbay	Read Replies (1) \| Respond to of 275872

Robert G: Probably. Intel has made it clear that it will use double patterning and not immersion for their 45 nm node. This may have been driven by the timetable for production immersion, along a strong desire to stay ahead of AMD, in process if not in architecture. Immersion is a bit less ready for production. AMD has indicated a mid-2008 transition to the 45 nm node, using immersion. That timetable is a good fit. I wonder if the double patterning choice was driven more by timing then performance.

To: FJB who wrote (218962)	12/5/2006 1:07:11 PM
From: TGPTNDR	Read Replies (1) \| Respond to of 275872

RG, Re: Double patterning is a resolution enhancement technique that involves splitting a dense circuit pattern into multiple, less-dense patterns. These simplified patterns are then printed sequentially on a target wafer. In between the exposures, the wafer is removed from the exposure system for additional processing. Double patterning improves the achievable resolution and enables the printing of smaller features. > Wasn't one of the INTC top brass moaning about factory thruput times in one of their last few CCs? -tgp