To: Sarmad Y. Hermiz who wrote (219193 ) 12/6/2006 12:19:36 AM From: misen Read Replies (1) | Respond to of 275872 Do different transistor designs yield differently just because the designs are different ? Another way to ask this question is: Are some designs more susceptible to a fatal failure just because of their design. i.e. their lines are so thin that an atom being in the wrong state causes failure, whereas another design has the lines thicker, so a one-atom defect doesn't make it fail ? Or, is it that all 65nm designs have the same susceptibility to defect density ? (for instance, if their lines were thicker, they wouldn't be 65 nm). I don't know of any significant yield effects due to atomic-level differences (aside from flash memory tunnel oxides perhaps). But I don't think that means that all 65nm designs have the same susceptibility to defect density. Seems like a false dichotomy to me. A 65 nm design drawn completely at minimum pitch would yield lower than a 65 nm design drawn completely at 2x minimum pitch. And, do differences in fabrication process steps (between Intel and AMD) lead to different defect density ? I would expect so but only a handful of people (at most) in the world would know what the magnitude of those differences are.ALso, do different designs bin differently ? such that if the lowest acceptable clock speed is say 2.0 GHz, some parts will operate correctly at no higher than 1.8 GHz, and therefor are not "defective", but still, are not good enough to sell ? Certainly, some products may have some yield at bins slow enough that they are not saleable while others are able to sell all functional die. The "lowest acceptable clock speed" is usually a function of marketing -- not design :) Misen