SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: fastpathguru who wrote (225599)2/8/2007 3:00:49 PM
From: Ali ChenRead Replies (2) | Respond to of 275872
 
fpg, "AMD has the superior interface to external memory, via the integrated memory controller."

From what I see from analysis of benchmarks, the superiority claim is exaggerated quite a bit. The memory traffic goes through several linked blocks, and the memory controller/FSB is only one of them. The main access to memory itself is the same for Intel and AMD, same DDR2 sticks. I haven't seen any data or speculation about how the actual access latency is split between the two links. I suspect that all potential advantages of the first (embedded) part are already factored. Increases in internal bandwidth and savings of one-two clocks do not do a squat if the processor stalls for hundreds of cycles waiting for data from memory.

Also keep in mind that the CPU<->memory is not the only traffic in the system that affect overall performance. Today's systems run a lot of bus-mastering traffic to control and data structures that reside in main memory. In AMD systems, this traffic has to go from peripherals through HT, and has to block resources of internal memory controller, which does not reduce latencies of main CPU accesses either. The HT in this sense is not much different from Intel's FSB. I am sure the things are much more complicated than that, but the bottom line is that the reality test of embedded controller concept did not reveal tremendous superiority of this approach, and was successfully countered by Intel with bigger caches, hardware prefetches, and processor-specific compiler improvements.

Cheers,

- Ali